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Searched refs:immh (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dtranslate-a64.c9763 int immh, int immb, int opcode, in handle_simd_shift_intfp_conv()
9767 int immhb = immh << 3 | immb; in handle_simd_shift_intfp_conv()
9769 if (immh & 8) { in handle_simd_shift_intfp_conv()
9775 } else if (immh & 4) { in handle_simd_shift_intfp_conv()
9777 } else if (immh & 2) { in handle_simd_shift_intfp_conv()
9784 /* immh == 0 would be a failure of the decode logic */ in handle_simd_shift_intfp_conv()
9785 g_assert(immh == 1); in handle_simd_shift_intfp_conv()
9807 int immh, int immb, int rn, int rd) in handle_simd_shift_fpint_conv()
9809 int immhb = immh << 3 | immb; in handle_simd_shift_fpint_conv()
9814 if (immh in handle_simd_shift_fpint_conv()
9762 handle_simd_shift_intfp_conv(DisasContext * s,bool is_scalar,bool is_q,bool is_u,int immh,int immb,int opcode,int rn,int rd) handle_simd_shift_intfp_conv() argument
9806 handle_simd_shift_fpint_conv(DisasContext * s,bool is_scalar,bool is_q,bool is_u,int immh,int immb,int rn,int rd) handle_simd_shift_fpint_conv() argument
9919 int immh = extract32(insn, 19, 4); disas_simd_scalar_shift_imm() local
10571 int immh = extract32(insn, 19, 4); disas_simd_shift_imm() local
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H A Dmve.decode399 # VIDUP, VDDUP format immediate: 1 << (immh:imml)
/openbmc/qemu/target/riscv/insn_trans/
H A Dtrans_rvi.c.inc490 TCGv immh = tcg_constant_tl(-(imm < 0));
491 tcg_gen_add2_tl(retl, reth, srcl, srch, imml, immh);