Searched refs:icr0 (Results 1 – 13 of 13) sorted by relevance
386 s->icr0 |= 1 << ITC_ICR0_ERR_AXI; in itc_storage_read()411 ret = s->icr0; in itc_storage_read()432 s->icr0 |= 1 << ITC_ICR0_ERR_AXI; in itc_storage_write()459 s->icr0 &= ~(data & 0x7); in itc_storage_write()462 s->icr0 &= ~0x700; in itc_storage_write()463 s->icr0 |= data & 0x700; in itc_storage_write()
83 uint64_t icr0:1; member117 uint64_t icr0:1;131 uint64_t icr0:1; member165 uint64_t icr0:1;184 uint64_t icr0:1; member208 uint64_t icr0:1;
30 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
33 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
31 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
29 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
72 uint64_t icr0; member
70 out_8(&intp->icr0[CONFIG_SYS_TMRINTR_NO], CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
43 u8 icr0; member
118 out_8(&icr->icr0, 0x00); /* sw watchdog */ in cpu_init_f()
39 u8 icr0[64]; /* 0x40 - 0x7F Control registers */ member
4318 u32 icr0, icr0_remaining; in i40e_intr() local4321 icr0 = rd32(hw, I40E_PFINT_ICR0); in i40e_intr()4325 if ((icr0 & I40E_PFINT_ICR0_INTEVENT_MASK) == 0) in i40e_intr()4329 if (((icr0 & ~I40E_PFINT_ICR0_INTEVENT_MASK) == 0) || in i40e_intr()4330 (icr0 & I40E_PFINT_ICR0_SWINT_MASK)) in i40e_intr()4334 (icr0 & I40E_PFINT_ICR0_ENA_PE_CRITERR_MASK)) { in i40e_intr()4341 if (icr0 & I40E_PFINT_ICR0_QUEUE_0_MASK) { in i40e_intr()4355 if (icr0 & I40E_PFINT_ICR0_ADMINQ_MASK) { in i40e_intr()4361 if (icr0 & I40E_PFINT_ICR0_MAL_DETECT_MASK) { in i40e_intr()4366 if (icr0 & I40E_PFINT_ICR0_VFLR_MASK) { in i40e_intr()[all …]