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Searched refs:icr (Results 1 – 25 of 82) sorted by relevance

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/openbmc/linux/arch/m68k/coldfire/
H A Dintc-5272.c39 unsigned int icr; member
45 /*MCF_IRQ_SPURIOUS*/ { .icr = 0, .index = 0, .ack = 0, },
46 /*MCF_IRQ_EINT1*/ { .icr = MCFSIM_ICR1, .index = 28, .ack = 1, },
47 /*MCF_IRQ_EINT2*/ { .icr = MCFSIM_ICR1, .index = 24, .ack = 1, },
48 /*MCF_IRQ_EINT3*/ { .icr = MCFSIM_ICR1, .index = 20, .ack = 1, },
49 /*MCF_IRQ_EINT4*/ { .icr = MCFSIM_ICR1, .index = 16, .ack = 1, },
50 /*MCF_IRQ_TIMER1*/ { .icr = MCFSIM_ICR1, .index = 12, .ack = 0, },
51 /*MCF_IRQ_TIMER2*/ { .icr = MCFSIM_ICR1, .index = 8, .ack = 0, },
52 /*MCF_IRQ_TIMER3*/ { .icr = MCFSIM_ICR1, .index = 4, .ack = 0, },
53 /*MCF_IRQ_TIMER4*/ { .icr = MCFSIM_ICR1, .index = 0, .ack = 0, },
[all …]
/openbmc/u-boot/drivers/i2c/
H A Dmv_i2c.c38 u32 icr; member
48 u32 icr; member
73 icr_mode = readl(&base->icr) & ICR_MODE_MASK; in i2c_reset()
74 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
75 writel(readl(&base->icr) | ICR_UR, &base->icr); /* reset the unit */ in i2c_reset()
77 writel(readl(&base->icr) & ~ICR_IUE, &base->icr); /* disable unit */ in i2c_reset()
83 writel(I2C_ICR_INIT | icr_mode, &base->icr); in i2c_reset()
85 writel(readl(&base->icr) | ICR_IUE, &base->icr); /* enable unit */ in i2c_reset()
139 writel(readl(&base->icr) & ~ICR_START, &base->icr); in i2c_transfer()
140 writel(readl(&base->icr) & ~ICR_STOP, &base->icr); in i2c_transfer()
[all …]
/openbmc/u-boot/arch/m68k/cpu/mcf530x/
H A Dcpu_init.c113 intctrl_t *icr = (intctrl_t *)(MMAP_INTC); in cpu_init_f() local
116 out_be32(&icr->imr, 0xfffffbff); in cpu_init_f()
118 out_8(&icr->icr0, 0x00); /* sw watchdog */ in cpu_init_f()
119 out_8(&icr->icr1, 0x00); /* timer 1 */ in cpu_init_f()
120 out_8(&icr->icr2, 0x88); /* timer 2 */ in cpu_init_f()
121 out_8(&icr->icr3, 0x00); /* i2c */ in cpu_init_f()
122 out_8(&icr->icr4, 0x00); /* uart 0 */ in cpu_init_f()
123 out_8(&icr->icr5, 0x00); /* uart 1 */ in cpu_init_f()
124 out_8(&icr->icr6, 0x00); /* dma 0 */ in cpu_init_f()
125 out_8(&icr->icr7, 0x00); /* dma 1 */ in cpu_init_f()
[all …]
H A Dinterrupts.c21 intctrl_t *icr = (intctrl_t *)(MMAP_INTC); in dtimer_intr_setup() local
24 out_be32(&icr->imr, in_be32(&icr->imr) & ~0x00000400); in dtimer_intr_setup()
26 out_8(&icr->icr2, CONFIG_SYS_TMRINTR_PRI); in dtimer_intr_setup()
/openbmc/linux/tools/testing/selftests/kvm/x86_64/
H A Dxapic_state_test.c55 uint64_t icr; in ____test_icr() local
72 icr = (u64)(*((u32 *)&xapic.regs[APIC_ICR])) | in ____test_icr()
76 TEST_ASSERT_EQ(icr, val & ~APIC_ICR_BUSY); in ____test_icr()
78 TEST_ASSERT_EQ(icr & ~APIC_ICR_BUSY, val & ~APIC_ICR_BUSY); in ____test_icr()
102 uint64_t icr, i, j; in test_icr() local
104 icr = APIC_DEST_SELF | APIC_INT_ASSERT | APIC_DM_FIXED; in test_icr()
106 __test_icr(x, icr | i); in test_icr()
108 icr = APIC_INT_ASSERT | APIC_DM_FIXED; in test_icr()
110 __test_icr(x, icr | i); in test_icr()
116 icr = APIC_INT_ASSERT | 0xff; in test_icr()
[all …]
/openbmc/qemu/hw/m68k/
H A Dmcf5206.c169 uint8_t icr[14]; member
198 if ((s->icr[i] & 0x1f) > level) { in m5206_find_pending_irq()
199 level = s->icr[i] & 0x1f; in m5206_find_pending_irq()
220 tmp = s->icr[irq]; in m5206_mbar_update()
269 s->icr[1] = 0x04; in m5206_mbar_reset()
270 s->icr[2] = 0x08; in m5206_mbar_reset()
271 s->icr[3] = 0x0c; in m5206_mbar_reset()
272 s->icr[4] = 0x10; in m5206_mbar_reset()
273 s->icr[5] = 0x14; in m5206_mbar_reset()
274 s->icr[6] = 0x18; in m5206_mbar_reset()
[all …]
H A Dmcf_intc.c31 uint8_t icr[64]; member
48 if ((active & 1) != 0 && s->icr[i] >= best_level) { in mcf_intc_update()
49 best_level = s->icr[i]; in mcf_intc_update()
66 return s->icr[offset - 0x40]; in mcf_intc_read()
102 s->icr[n] = val; in mcf_intc_write()
162 memset(s->icr, 0, 64); in mcf_intc_reset()
/openbmc/qemu/hw/gpio/
H A Dimx_gpio.c93 } else if (extract64(s->icr, 2*line + 1, 1)) { in imx_gpio_set_int_line()
97 if (extract64(s->icr, 2*line, 1) != level) { in imx_gpio_set_int_line()
103 if (extract64(s->icr, 2*line, 1) == level) { in imx_gpio_set_int_line()
172 reg_value = extract64(s->icr, 0, 32); in imx_gpio_read()
176 reg_value = extract64(s->icr, 32, 32); in imx_gpio_read()
229 s->icr = deposit64(s->icr, 0, 32, value); in imx_gpio_write()
234 s->icr = deposit64(s->icr, 32, 32, value); in imx_gpio_write()
284 VMSTATE_UINT64(icr, IMXGPIOState),
307 s->icr = 0; in imx_gpio_reset()
H A Dmpc8xxx.c43 uint32_t icr; member
56 VMSTATE_UINT32(icr, MPC8XXXGPIOState),
88 return s->icr; in mpc8xxx_gpio_read()
142 s->icr = value; in mpc8xxx_gpio_write()
158 s->icr = 0; in mpc8xxx_gpio_reset()
174 if (!(s->icr & irq) || (old_value && !level)) { in mpc8xxx_gpio_set_irq()
/openbmc/linux/drivers/i2c/busses/
H A Di2c-pxa.c137 u32 icr; member
159 .icr = 0x10,
168 .icr = 0x08,
177 .icr = 0x00,
186 .icr = 0x10,
197 .icr = 0x08,
407 unsigned long icr = readl(_ICR(i2c)); in i2c_pxa_abort() local
409 icr &= ~ICR_START; in i2c_pxa_abort()
410 icr |= ICR_ACKNAK | ICR_STOP | ICR_TB; in i2c_pxa_abort()
412 writel(icr, _ICR(i2c)); in i2c_pxa_abort()
[all …]
/openbmc/linux/drivers/char/
H A Ddsp56k.c52 #define DSP56K_TX_INT_ON dsp56k_host_interface.icr |= DSP56K_ICR_TREQ
53 #define DSP56K_RX_INT_ON dsp56k_host_interface.icr |= DSP56K_ICR_RREQ
54 #define DSP56K_TX_INT_OFF dsp56k_host_interface.icr &= ~DSP56K_ICR_TREQ
55 #define DSP56K_RX_INT_OFF dsp56k_host_interface.icr &= ~DSP56K_ICR_RREQ
371 dsp56k_host_interface.icr |= DSP56K_ICR_HF0; in dsp56k_ioctl()
373 dsp56k_host_interface.icr &= ~DSP56K_ICR_HF0; in dsp56k_ioctl()
375 dsp56k_host_interface.icr |= DSP56K_ICR_HF1; in dsp56k_ioctl()
377 dsp56k_host_interface.icr &= ~DSP56K_ICR_HF1; in dsp56k_ioctl()
380 if (dsp56k_host_interface.icr & DSP56K_ICR_HF0) status |= 0x1; in dsp56k_ioctl()
381 if (dsp56k_host_interface.icr & DSP56K_ICR_HF1) status |= 0x2; in dsp56k_ioctl()
[all …]
/openbmc/linux/arch/x86/kernel/apic/
H A Dlocal.h34 unsigned int icr = shortcut | dest; in __prepare_ICR() local
38 icr |= APIC_DM_FIXED | vector; in __prepare_ICR()
41 icr |= APIC_DM_NMI; in __prepare_ICR()
44 return icr; in __prepare_ICR()
/openbmc/qemu/hw/net/
H A Dmv88w8618_eth.c100 uint32_t icr; member
155 s->icr |= MP_ETH_IRQ_RX; in eth_receive()
156 if (s->icr & s->imr) { in eth_receive()
209 s->icr |= 1 << (MP_ETH_IRQ_TXLO_BIT - queue_index); in eth_send()
239 return s->icr; in mv88w8618_eth_read()
279 if (value & (MP_ETH_CMD_TXHI | MP_ETH_CMD_TXLO) && s->icr & s->imr) { in mv88w8618_eth_write()
285 s->icr &= value; in mv88w8618_eth_write()
290 if (s->icr & s->imr) { in mv88w8618_eth_write()
363 VMSTATE_UINT32(icr, mv88w8618_eth_state),
/openbmc/linux/drivers/misc/vmw_vmci/
H A Dvmci_guest.c492 unsigned int icr; in vmci_interrupt() local
495 icr = vmci_read_reg(dev, VMCI_ICR_ADDR); in vmci_interrupt()
496 if (icr == 0 || icr == ~0) in vmci_interrupt()
499 if (icr & VMCI_ICR_DATAGRAM) { in vmci_interrupt()
501 icr &= ~VMCI_ICR_DATAGRAM; in vmci_interrupt()
504 if (icr & VMCI_ICR_NOTIFICATION) { in vmci_interrupt()
506 icr &= ~VMCI_ICR_NOTIFICATION; in vmci_interrupt()
510 if (icr & VMCI_ICR_DMA_DATAGRAM) { in vmci_interrupt()
512 icr &= ~VMCI_ICR_DMA_DATAGRAM; in vmci_interrupt()
515 if (icr != 0) in vmci_interrupt()
[all …]
/openbmc/linux/drivers/rtc/
H A Drtc-isl1208.c276 int icr = i2c_smbus_read_byte_data(client, ISL1208_REG_INT); in isl1208_rtc_toggle_alarm() local
278 if (icr < 0) { in isl1208_rtc_toggle_alarm()
280 return icr; in isl1208_rtc_toggle_alarm()
284 icr |= ISL1208_REG_INT_ALME | ISL1208_REG_INT_IM; in isl1208_rtc_toggle_alarm()
286 icr &= ~(ISL1208_REG_INT_ALME | ISL1208_REG_INT_IM); in isl1208_rtc_toggle_alarm()
288 icr = i2c_smbus_write_byte_data(client, ISL1208_REG_INT, icr); in isl1208_rtc_toggle_alarm()
289 if (icr < 0) { in isl1208_rtc_toggle_alarm()
291 return icr; in isl1208_rtc_toggle_alarm()
384 int icr, yr, sr = isl1208_i2c_get_sr(client); in isl1208_i2c_read_alarm() local
416 icr = i2c_smbus_read_byte_data(client, ISL1208_REG_INT); in isl1208_i2c_read_alarm()
[all …]
/openbmc/qemu/hw/intc/
H A Dapic.c693 int trig_mode = (s->icr[0] >> 15) & 1; in apic_deliver()
694 int level = (s->icr[0] >> 14) & 1; in apic_deliver()
864 val = s->icr[index & 1]; in apic_register_read()
1002 s->icr[0] = val; in apic_register_write()
1004 s->icr[1] = val >> 32; in apic_register_write()
1005 dest = s->icr[1]; in apic_register_write()
1007 dest = (s->icr[1] >> 24) & 0xff; in apic_register_write()
1010 apic_deliver(dev, dest, (s->icr[0] >> 11) & 1, in apic_register_write()
1011 (s->icr[0] >> 8) & 7, (s->icr[0] & 0xff), in apic_register_write()
1012 (s->icr[0] >> 15) & 1, (s->icr[0] >> 18) & 3); in apic_register_write()
[all …]
/openbmc/qemu/hw/misc/
H A Dlasi.c76 val = s->icr & ICR_BUS_ERROR_BIT; /* bus_error */ in lasi_chip_read_with_attrs()
142 s->icr = val; in lasi_chip_write_with_attrs()
216 VMSTATE_UINT32(icr, LasiState),
236 if ((s->icr & ICR_BUS_ERROR_BIT) == 0) { in lasi_set_irq()
/openbmc/qemu/target/i386/
H A Dcpu-dump.c226 uint32_t icr = s->icr[0], icr2 = s->icr[1]; in dump_apic_icr() local
228 (icr & APIC_ICR_DEST_SHORT) >> APIC_ICR_DEST_SHORT_SHIFT; in dump_apic_icr()
229 bool logical_mod = icr & APIC_ICR_DEST_MOD; in dump_apic_icr()
235 icr, in dump_apic_icr()
237 icr & APIC_ICR_TRIGGER_MOD ? "level" : "edge", in dump_apic_icr()
238 icr & APIC_ICR_LEVEL ? "assert" : "de-assert", in dump_apic_icr()
/openbmc/qemu/hw/pci-host/
H A Ddino.c144 val = s->icr; in dino_chip_read_with_attrs()
155 val = s->ilr & s->imr & ~s->icr; in dino_chip_read_with_attrs()
158 val = s->ilr & s->imr & s->icr; in dino_chip_read_with_attrs()
241 s->icr = val; in dino_chip_write_with_attrs()
295 VMSTATE_UINT32(icr, DinoState),
388 uint32_t iar = (ena & s->icr ? s->iar1 : s->iar0); in dino_set_irq()
/openbmc/linux/arch/m68k/amiga/
H A Dcia.c55 old = (base->icr_data |= base->cia->icr); in cia_set_irq()
74 base->icr_data |= base->cia->icr; in cia_able_irq()
75 base->cia->icr = mask; in cia_able_irq()
/openbmc/linux/arch/powerpc/platforms/embedded6xx/
H A Dflipper-pic.c235 u32 icr; in flipper_is_reset_button_pressed() local
239 icr = in_be32(io_base + FLIPPER_ICR); in flipper_is_reset_button_pressed()
240 return !(icr & FLIPPER_ICR_RSS); in flipper_is_reset_button_pressed()
/openbmc/linux/drivers/net/fjes/
H A Dfjes_main.c347 u32 icr; in fjes_intr() local
349 icr = fjes_hw_capture_interrupt_status(hw); in fjes_intr()
351 if (icr & REG_IS_MASK_IS_ASSERT) { in fjes_intr()
352 if (icr & REG_ICTL_MASK_RX_DATA) { in fjes_intr()
353 fjes_rx_irq(adapter, icr & REG_IS_MASK_EPID); in fjes_intr()
354 hw->ep_shm_info[icr & REG_IS_MASK_EPID].ep_stats in fjes_intr()
358 if (icr & REG_ICTL_MASK_DEV_STOP_REQ) { in fjes_intr()
359 fjes_stop_req_irq(adapter, icr & REG_IS_MASK_EPID); in fjes_intr()
360 hw->ep_shm_info[icr & REG_IS_MASK_EPID].ep_stats in fjes_intr()
364 if (icr & REG_ICTL_MASK_TXRX_STOP_REQ) { in fjes_intr()
[all …]
/openbmc/qemu/hw/i386/kvm/
H A Dapic.c53 kvm_apic_set_reg(kapic, 0x30, s->icr[0]); in kvm_put_apic_state()
54 kvm_apic_set_reg(kapic, 0x31, s->icr[1]); in kvm_put_apic_state()
83 s->icr[0] = kvm_apic_get_reg(kapic, 0x30); in kvm_get_apic_state()
84 s->icr[1] = kvm_apic_get_reg(kapic, 0x31); in kvm_get_apic_state()
/openbmc/linux/drivers/net/can/sja1000/
H A Dpeak_pci.c543 u16 icr; in peak_pci_post_irq() local
546 icr = readw(chan->cfg_base + PITA_ICR); in peak_pci_post_irq()
547 if (icr & chan->icr_mask) in peak_pci_post_irq()
557 u16 sub_sys_id, icr; in peak_pci_probe() local
628 icr = readw(cfg_base + PITA_ICR + 2); in peak_pci_probe()
659 icr |= chan->icr_mask; in peak_pci_probe()
695 writew(icr, cfg_base + PITA_ICR + 2); in peak_pci_probe()
/openbmc/qemu/target/i386/whpx/
H A Dwhpx-apic.c49 kapic->fields[0x30].data = s->icr[0]; in whpx_put_apic_state()
50 kapic->fields[0x31].data = s->icr[1]; in whpx_put_apic_state()
77 s->icr[0] = kapic->fields[0x30].data; in whpx_get_apic_state()
78 s->icr[1] = kapic->fields[0x31].data; in whpx_get_apic_state()

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