Searched refs:icp (Results 1 – 9 of 9) sorted by relevance
| /openbmc/qemu/hw/intc/ |
| H A D | xics.c | 44 void icp_pic_print_info(ICPState *icp, GString *buf) in icp_pic_print_info() argument 51 if (!icp) { in icp_pic_print_info() 55 cpu_index = icp->cs ? icp->cs->cpu_index : -1; in icp_pic_print_info() 57 if (!icp->output) { in icp_pic_print_info() 62 icp_synchronize_state(icp); in icp_pic_print_info() 66 cpu_index, icp->xirr, icp->xirr_owner, in icp_pic_print_info() 67 icp->pending_priority, icp->mfrr); in icp_pic_print_info() 106 #define XISR(icp) (((icp)->xirr) & XISR_MASK) argument 107 #define CPPR(icp) (((icp)->xirr) >> 24) argument 112 static void icp_check_ipi(ICPState *icp) in icp_check_ipi() argument [all …]
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| H A D | xics_pnv.c | 36 ICPState *icp = ICP(opaque); in pnv_icp_read() local 43 val = icp_ipoll(icp, NULL); in pnv_icp_read() 52 val = icp_ipoll(icp, NULL) >> 24; in pnv_icp_read() 54 val = icp_accept(icp); in pnv_icp_read() 61 val = icp->mfrr; in pnv_icp_read() 99 ICPState *icp = ICP(opaque); in pnv_icp_write() local 106 icp_set_cppr(icp, val); in pnv_icp_write() 108 icp_eoi(icp, val); in pnv_icp_write() 115 icp_set_mfrr(icp, val); in pnv_icp_write() 164 ICPState *icp = ICP(dev); in pnv_icp_realize() local [all …]
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| H A D | xics_kvm.c | 65 void icp_get_kvm_state(ICPState *icp) in icp_get_kvm_state() argument 76 if (!icp->cs) { in icp_get_kvm_state() 80 ret = kvm_get_one_reg(icp->cs, KVM_REG_PPC_ICP_STATE, &state); in icp_get_kvm_state() 83 " for CPU %ld: %s", kvm_arch_vcpu_id(icp->cs), strerror(errno)); in icp_get_kvm_state() 87 icp->xirr = state >> KVM_REG_PPC_ICP_XISR_SHIFT; in icp_get_kvm_state() 88 icp->mfrr = (state >> KVM_REG_PPC_ICP_MFRR_SHIFT) in icp_get_kvm_state() 90 icp->pending_priority = (state >> KVM_REG_PPC_ICP_PPRI_SHIFT) in icp_get_kvm_state() 99 void icp_synchronize_state(ICPState *icp) in icp_synchronize_state() argument 101 if (icp->cs) { in icp_synchronize_state() 102 run_on_cpu(icp->cs, do_icp_synchronize_state, RUN_ON_CPU_HOST_PTR(icp)); in icp_synchronize_state() [all …]
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| H A D | xics_spapr.c | 68 icp_set_cppr(spapr_cpu_state(cpu)->icp, cppr); in h_cppr() 76 ICPState *icp = xics_icp_get(XICS_FABRIC(spapr), args[0]); in h_ipi() local 80 if (!icp) { in h_ipi() 84 icp_set_mfrr(icp, mfrr); in h_ipi() 91 uint32_t xirr = icp_accept(spapr_cpu_state(cpu)->icp); in h_xirr() 102 uint32_t xirr = icp_accept(spapr_cpu_state(cpu)->icp); in h_xirr_x() 118 icp_eoi(spapr_cpu_state(cpu)->icp, xirr); in h_eoi() 125 ICPState *icp = xics_icp_get(XICS_FABRIC(spapr), args[0]); in h_ipoll() local 131 if (!icp) { in h_ipoll() 135 xirr = icp_ipoll(icp, &mfrr); in h_ipoll() [all …]
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| /openbmc/qemu/include/hw/ppc/ |
| H A D | xics.h | 156 void icp_set_cppr(ICPState *icp, uint8_t cppr); 157 void icp_set_mfrr(ICPState *icp, uint8_t mfrr); 160 void icp_eoi(ICPState *icp, uint32_t xirr); 162 void icp_reset(ICPState *icp); 174 void icp_pic_print_info(ICPState *icp, GString *buf); 182 void icp_destroy(ICPState *icp); 185 void icp_get_kvm_state(ICPState *icp); 186 int icp_set_kvm_state(ICPState *icp, Error **errp); 187 void icp_synchronize_state(ICPState *icp);
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| H A D | spapr_cpu_core.h | 50 struct ICPState *icp; member
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| /openbmc/qemu/hw/arm/ |
| H A D | integratorcp.c | 594 DeviceState *dev, *sic, *icp; in integratorcp_init() local 639 icp = sysbus_create_simple(TYPE_ICP_CONTROL_REGS, 0xcb000000, in integratorcp_init() 647 qdev_get_gpio_in_named(icp, ICP_GPIO_MMC_WPROT, 0)); in integratorcp_init() 649 qdev_get_gpio_in_named(icp, ICP_GPIO_MMC_CARDIN, 0)); in integratorcp_init()
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| /openbmc/qemu/hw/ppc/ |
| H A D | pnv.c | 1514 PnvICPState *icp; in pnv_chip_icp_realize() local 1517 icp = PNV_ICP(xics_icp_get(chip8->xics, pir)); in pnv_chip_icp_realize() 1520 &icp->mmio); in pnv_chip_icp_realize()
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| H A D | spapr.c | 4459 return cpu ? spapr_cpu_state(cpu)->icp : NULL; in spapr_icp_get()
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