| /openbmc/u-boot/drivers/i2c/ |
| H A D | davinci_i2c.c | 34 REG(&(i2c_base->i2c_con)) = 0;\
81 REG(&(i2c_base->i2c_drr)); in _flush_rx()
97 REG(&(i2c_base->i2c_sclh)) = div - REG(&(i2c_base->i2c_scll)); in _davinci_i2c_setspeed()
113 REG(&(i2c_base->i2c_cnt)) = 0; in _davinci_i2c_init()
136 if (_wait_for_bus(i2c_base)) in _davinci_i2c_read()
215 _flush_rx(i2c_base); in _davinci_i2c_read()
238 if (_wait_for_bus(i2c_base)) in _davinci_i2c_write()
297 _flush_rx(i2c_base); in _davinci_i2c_write()
313 if (_wait_for_bus(i2c_base)) in _davinci_i2c_probe_chip()
325 _flush_rx(i2c_base); in _davinci_i2c_probe_chip()
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| H A D | designware_i2c.c | 45 writel(ena, &i2c_base->ic_enable); in dw_i2c_enable()
95 dw_i2c_enable(i2c_base, false); in __dw_i2c_set_bus_speed()
143 writel(cntl, &i2c_base->ic_con); in __dw_i2c_set_bus_speed()
150 dw_i2c_enable(i2c_base, true); in __dw_i2c_set_bus_speed()
164 dw_i2c_enable(i2c_base, false); in i2c_setaddress()
169 dw_i2c_enable(i2c_base, true); in i2c_setaddress()
180 readl(&i2c_base->ic_cmd_data); in i2c_flush_rxfifo()
206 if (i2c_wait_for_bb(i2c_base)) in i2c_xfer_init()
209 i2c_setaddress(i2c_base, chip); in i2c_xfer_init()
237 i2c_flush_rxfifo(i2c_base); in i2c_xfer_finish()
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| H A D | omap24xx_i2c.c | 294 omap_i2c_write_reg(i2c_base, ip_rev, in flush_fifo()
395 omap_i2c_write_reg(i2c_base, ip_rev, in omap24_i2c_deblock()
400 omap_i2c_write_reg(i2c_base, ip_rev, in omap24_i2c_deblock()
464 flush_fifo(i2c_base, ip_rev); in __omap24_i2c_init()
531 flush_fifo(i2c_base, ip_rev); in __omap24_i2c_probe()
686 omap_i2c_write_reg(i2c_base, ip_rev, in __omap24_i2c_read()
690 omap_i2c_write_reg(i2c_base, ip_rev, in __omap24_i2c_read()
697 flush_fifo(i2c_base, ip_rev); in __omap24_i2c_read()
786 omap_i2c_write_reg(i2c_base, ip_rev, in __omap24_i2c_write()
789 omap_i2c_write_reg(i2c_base, ip_rev, in __omap24_i2c_write()
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| H A D | fsl_i2c.c | 40 static const struct fsl_i2c_base *i2c_base[4] = { variable
499 __i2c_init(i2c_base[adap->hwadapnr], speed, slaveadd, in fsl_i2c_init()
505 return __i2c_probe_chip(i2c_base[adap->hwadapnr], chip); in fsl_i2c_probe_chip()
513 return __i2c_read(i2c_base[adap->hwadapnr], chip_addr, &o[4 - olen], in fsl_i2c_read()
522 return __i2c_write(i2c_base[adap->hwadapnr], chip_addr, &o[4 - olen], in fsl_i2c_write()
528 return __i2c_set_bus_speed(i2c_base[adap->hwadapnr], speed, in fsl_i2c_set_bus_speed()
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| /openbmc/linux/drivers/i2c/busses/ |
| H A D | i2c-mchp-pci1xxxx.c | 329 void __iomem *i2c_base; member
336 void __iomem *p = i2c->i2c_base + SMB_GPR_LOCK_REG; in set_sys_lock()
349 void __iomem *p = i2c->i2c_base + SMB_GPR_LOCK_REG; in release_sys_lock()
414 writeb(regval, i2c->i2c_base + SMB_CORE_CTRL_REG_OFF); in pci1xxxx_i2c_set_clear_FW_ACK()
420 void __iomem *p = i2c->i2c_base + SMBUS_MST_BUF; in pci1xxxx_i2c_buffer_write()
667 void __iomem *bp = i2c->i2c_base; in pci1xxxx_i2c_set_freq()
709 void __iomem *p1 = i2c->i2c_base + SMB_GPR_REG; in pci1xxxx_i2c_init()
783 void __iomem *p3 = i2c->i2c_base + SMBUS_MST_BUF; in pci1xxxx_i2c_read()
1069 void __iomem *p = i2c->i2c_base + SMBUS_RESET_REG; in pci1xxxx_i2c_suspend()
1103 void __iomem *p2 = i2c->i2c_base + SMBUS_RESET_REG; in pci1xxxx_i2c_resume()
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| H A D | i2c-cpm.c | 428 void __iomem *i2c_base; in cpm_i2c_setup() local
448 i2c_base = of_iomap(ofdev->dev.of_node, 1); in cpm_i2c_setup()
449 if (i2c_base == NULL) { in cpm_i2c_setup()
457 cpm->i2c_ram = i2c_base; in cpm_i2c_setup()
466 iounmap(i2c_base); in cpm_i2c_setup()
474 out_be16(i2c_base, cpm->i2c_addr); in cpm_i2c_setup()
475 iounmap(i2c_base); in cpm_i2c_setup()
480 iounmap(i2c_base); in cpm_i2c_setup()
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| /openbmc/u-boot/board/samsung/smdk5250/ |
| H A D | smdk5250_spl.c | 38 .i2c_base = 0x12c60000,
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| /openbmc/u-boot/board/samsung/smdk5420/ |
| H A D | smdk5420_spl.c | 38 .i2c_base = 0x12c60000,
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| /openbmc/u-boot/board/samsung/arndale/ |
| H A D | arndale_spl.c | 36 .i2c_base = 0x12c60000,
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| /openbmc/u-boot/arch/arm/mach-exynos/include/mach/ |
| H A D | spl.h | 55 u32 i2c_base; /* i2c base address */ member
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| /openbmc/linux/drivers/clk/tegra/ |
| H A D | clk-dfll.c | 265 void __iomem *i2c_base; member
351 return __raw_readl(td->i2c_base + offs); in dfll_i2c_readl()
356 __raw_writel(val, td->i2c_base + offs); in dfll_i2c_writel()
2016 td->i2c_base = devm_ioremap(td->dev, mem->start, resource_size(mem)); in tegra_dfll_register()
2017 if (!td->i2c_base) { in tegra_dfll_register()
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