Searched refs:hsync_pulse_width (Results 1 – 7 of 7) sorted by relevance
122 hsync_period = p->hsync_pulse_width + p->h_back_porch + p->width + in dpu_hw_intf_setup_timing_engine()132 hsync_start_x = p->h_back_porch + p->hsync_pulse_width; in dpu_hw_intf_setup_timing_engine()161 hsync_ctl = (hsync_period << 16) | p->hsync_pulse_width; in dpu_hw_intf_setup_timing_engine()176 display_v_start += p->hsync_pulse_width + p->h_back_porch; in dpu_hw_intf_setup_timing_engine()
27 u32 hsync_pulse_width; member
82 timing->hsync_pulse_width = mode->hsync_end - mode->hsync_start; in drm_mode_to_intf_timing_params()116 timing->hsync_pulse_width = timing->hsync_pulse_width >> 1; in drm_mode_to_intf_timing_params()125 timing->hsync_pulse_width; in get_horizontal_total()
62 unsigned char hsync_pulse_width; member70 (_x).hsync_pulse_width)
302 u8 hsync_pulse_width; member
155 dvo_timing->hsync_pulse_width; in fill_detail_timing_data()
3451 …unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse… in drm_mode_detailed() local3470 if (!hsync_pulse_width || !vsync_pulse_width) { in drm_mode_detailed()3495 mode->hsync_end = mode->hsync_start + hsync_pulse_width; in drm_mode_detailed()