/openbmc/linux/arch/arm64/include/asm/ |
H A D | hardirq.h | 22 u64 hcr; member 58 ___ctx->hcr = ___hcr; \ 70 ___hcr = ___ctx->hcr; \
|
/openbmc/linux/drivers/usb/serial/ |
H A D | ark3116.c | 67 __u32 hcr; /* handshake control register (0x8) member 145 priv->hcr = 0; in ark3116_port_probe() 200 __u8 lcr, hcr, eval; in ark3116_set_termios() local 215 hcr = (cflag & CRTSCTS) ? 0x03 : 0x00; in ark3116_set_termios() 246 __func__, hcr, lcr, quot); in ark3116_set_termios() 249 if (priv->hcr != hcr) { in ark3116_set_termios() 250 priv->hcr = hcr; in ark3116_set_termios() 251 ark3116_write_reg(serial, 0x8, hcr); in ark3116_set_termios()
|
/openbmc/qemu/target/arm/tcg/ |
H A D | hflags.c | 210 uint64_t hcr = arm_hcr_el2_eff(env); in rebuild_hflags_a64() local 303 if ((hcr & (HCR_NV | HCR_NV1)) != (HCR_NV | HCR_NV1)) { in rebuild_hflags_a64() 340 if (el == 1 && (hcr & HCR_NV)) { in rebuild_hflags_a64() 343 if (hcr & HCR_NV1) { in rebuild_hflags_a64() 346 if (hcr & HCR_NV2) { in rebuild_hflags_a64() 348 if (hcr & HCR_E2H) { in rebuild_hflags_a64()
|
H A D | op_helper.c | 1220 uint64_t hcr = arm_hcr_el2_eff(env); in HELPER() local 1221 bool enabled = !(hcr & HCR_TGE) && (hcr & HCR_AMO); in HELPER() 1222 bool pending = enabled && (hcr & HCR_VSE); in HELPER()
|
H A D | pauth_helper.c | 467 uint64_t hcr = arm_hcr_el2_eff(env); in pauth_check_trap() local 468 bool trap = !(hcr & HCR_API); in pauth_check_trap() 471 trap &= (hcr & (HCR_E2H | HCR_TGE)) != (HCR_E2H | HCR_TGE); in pauth_check_trap()
|
/openbmc/qemu/target/arm/ |
H A D | ptw.c | 498 if (hcr & HCR_FWB) { in S2_attrs_are_device() 604 if ((hcr & HCR_PTW) && S2_attrs_are_device(hcr, pte_attrs)) { in S1_ptw_translate() 2991 if (hcr & HCR_CD) { /* cache disabled */ in convert_stage2_attrs() 3037 static uint8_t combined_attrs_nofwb(uint64_t hcr, in combined_attrs_nofwb() argument 3148 static ARMCacheAttrs combine_cacheattrs(uint64_t hcr, in combine_cacheattrs() argument 3175 if (hcr & HCR_FWB) { in combine_cacheattrs() 3259 if (hcr & HCR_DC) { in get_phys_addr_disabled() 3260 if (hcr & HCR_DCT) { in get_phys_addr_disabled() 3301 uint64_t hcr; in get_phys_addr_twostage() local 3359 hcr = arm_hcr_el2_eff_secstate(env, in_space); in get_phys_addr_twostage() [all …]
|
H A D | helper.c | 2497 uint64_t hcr; in gt_cntfrq_access() local 2554 (hcr & HCR_E2H in gt_counter_access() 2808 uint64_t hcr; in gt_virt_cnt_offset() local 4935 if (hcr & HCR_E2H) { in vae2_tlbmask() 4983 if (hcr & HCR_E2H) { in vae2_tlbbits() 8153 if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) { in access_mte() 8193 if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) { in access_tfsr_el2() 8355 if (el == 0 && !((hcr & HCR_E2H) && (hcr & HCR_TGE))) { in access_scxtnum() 10773 bool hcr; in arm_phys_excp_target_el() local 11574 uint64_t hcr; in arm_cpu_do_interrupt_aarch64() local [all …]
|
H A D | cpu.c | 777 bool hcr, scr; in arm_excp_unmasked() local 788 hcr = hcr_el2 & HCR_FMO; in arm_excp_unmasked() 797 scr = scr && !((env->cp15.scr_el3 & SCR_FW) && !hcr); in arm_excp_unmasked() 807 hcr = hcr_el2 & HCR_IMO; in arm_excp_unmasked() 814 if ((scr || hcr) && !secure) { in arm_excp_unmasked() 1222 uint64_t hcr = arm_hcr_el2_eff(env); in aarch64_cpu_dump_state() local 1261 (hcr & HCR_NV) ? " NV" : "", in aarch64_cpu_dump_state() 1262 (hcr & HCR_NV1) ? " NV1" : "", in aarch64_cpu_dump_state() 1263 (hcr & HCR_NV2) ? " NV2" : ""); in aarch64_cpu_dump_state()
|
H A D | internals.h | 1358 uint64_t hcr = arm_hcr_el2_eff(env); in allocation_tag_access_enabled() local 1359 if (!(hcr & HCR_ATA) && (!(hcr & HCR_E2H) || !(hcr & HCR_TGE))) { in allocation_tag_access_enabled()
|
/openbmc/linux/drivers/net/wireless/intersil/hostap/ |
H A D | hostap_cs.c | 244 static void sandisk_write_hcr(local_info_t *local, int hcr) in sandisk_write_hcr() argument 252 HFA384X_OUTB(hcr, SANDISK_HCR_OFF); in sandisk_write_hcr() 368 static void prism2_pccard_genesis_reset(local_info_t *local, int hcr) in prism2_pccard_genesis_reset() argument 378 sandisk_write_hcr(local, hcr); in prism2_pccard_genesis_reset() 399 res = pcmcia_write_config_byte(hw_priv->link, CISREG_CCSR, hcr); in prism2_pccard_genesis_reset()
|
H A D | hostap_download.c | 388 static int prism2_enable_genesis(local_info_t *local, int hcr) in prism2_enable_genesis() argument 395 dev->name, hcr); in prism2_enable_genesis() 398 local->func->genesis_reset(local, hcr); in prism2_enable_genesis() 407 hcr); in prism2_enable_genesis() 411 hcr, initseq, readbuf); in prism2_enable_genesis()
|
H A D | hostap_plx.c | 296 static void prism2_plx_genesis_reset(local_info_t *local, int hcr) in prism2_plx_genesis_reset() argument 306 outb(hcr, hw_priv->cor_offset + 2); in prism2_plx_genesis_reset() 316 writeb(hcr, hw_priv->attr_mem + hw_priv->cor_offset + 2); in prism2_plx_genesis_reset()
|
H A D | hostap_pci.c | 267 static void prism2_pci_genesis_reset(local_info_t *local, int hcr) in prism2_pci_genesis_reset() argument 273 HFA384X_OUTW(hcr, HFA384X_PCIHCR_OFF); in prism2_pci_genesis_reset()
|
H A D | hostap_wlan.h | 579 void (*genesis_reset)(local_info_t *local, int hcr);
|
/openbmc/linux/drivers/infiniband/hw/mthca/ |
H A D | mthca_cmd.c | 194 return readl(dev->hcr + HCR_STATUS_OFFSET) & in go_bit() 257 __raw_writel((__force u32) cpu_to_be32(in_param >> 32), dev->hcr + 0 * 4); in mthca_cmd_post_hcr() 258 __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), dev->hcr + 1 * 4); in mthca_cmd_post_hcr() 259 __raw_writel((__force u32) cpu_to_be32(in_modifier), dev->hcr + 2 * 4); in mthca_cmd_post_hcr() 270 op), dev->hcr + 6 * 4); in mthca_cmd_post_hcr() 367 __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET)) << 32 | in mthca_cmd_poll() 369 __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET + 4)); in mthca_cmd_poll() 528 dev->hcr = ioremap(pci_resource_start(dev->pdev, 0) + MTHCA_HCR_BASE, in mthca_cmd_init() 530 if (!dev->hcr) { in mthca_cmd_init() 539 iounmap(dev->hcr); in mthca_cmd_init() [all …]
|
H A D | mthca_dev.h | 322 void __iomem *hcr; member
|
/openbmc/linux/drivers/net/ethernet/mellanox/mlx4/ |
H A D | cmd.c | 437 u32 __iomem *hcr = cmd->hcr; in mlx4_cmd_post() local 496 op), hcr + 6); in mlx4_cmd_post() 581 void __iomem *hcr = priv->cmd.hcr; in mlx4_cmd_poll() local 638 __raw_readl(hcr + HCR_OUT_PARAM_OFFSET)) << 32 | in mlx4_cmd_poll() 640 __raw_readl(hcr + HCR_OUT_PARAM_OFFSET + 4)); in mlx4_cmd_poll() 642 __raw_readl(hcr + HCR_STATUS_OFFSET)) >> 24; in mlx4_cmd_poll() 2509 if (!mlx4_is_slave(dev) && !priv->cmd.hcr) { in mlx4_cmd_init() 2512 if (!priv->cmd.hcr) { in mlx4_cmd_init() 2602 if (!mlx4_is_slave(dev) && priv->cmd.hcr && in mlx4_cmd_cleanup() 2604 iounmap(priv->cmd.hcr); in mlx4_cmd_cleanup() [all …]
|
H A D | mlx4.h | 632 void __iomem *hcr; member
|
/openbmc/linux/arch/arm64/kvm/hyp/include/hyp/ |
H A D | switch.h | 238 u64 hcr = vcpu->arch.hcr_el2; in ___activate_traps() local 241 hcr |= HCR_TVM; in ___activate_traps() 243 write_sysreg(hcr, hcr_el2); in ___activate_traps() 245 if (cpus_have_final_cap(ARM64_HAS_RAS_EXTN) && (hcr & HCR_VSE)) in ___activate_traps()
|
/openbmc/linux/drivers/atm/ |
H A D | fore200e.c | 467 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr); in fore200e_pca_irq_ack() 474 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr); in fore200e_pca_reset() 476 writel(0, fore200e->regs.pca.hcr); in fore200e_pca_reset() 494 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET; in fore200e_pca_map() 644 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; in fore200e_sba_irq_enable() local 645 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr); in fore200e_sba_irq_enable() 655 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY; in fore200e_sba_irq_ack() local 656 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr); in fore200e_sba_irq_ack() 661 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr); in fore200e_sba_reset() 663 fore200e->bus->write(0, fore200e->regs.sba.hcr); in fore200e_sba_reset() [all …]
|
H A D | fore200e.h | 773 volatile u32 __iomem * hcr; /* address of host control register */ member 782 u32 __iomem *hcr; /* address of host control register */ member
|
/openbmc/linux/arch/arm64/kvm/hyp/ |
H A D | vgic-v3-sr.c | 723 u32 hcr; in __vgic_v3_bump_eoicount() local 725 hcr = read_gicreg(ICH_HCR_EL2); in __vgic_v3_bump_eoicount() 726 hcr += 1 << ICH_HCR_EOIcount_SHIFT; in __vgic_v3_bump_eoicount() 727 write_gicreg(hcr, ICH_HCR_EL2); in __vgic_v3_bump_eoicount()
|
/openbmc/u-boot/arch/m68k/include/asm/coldfire/ |
H A D | lcd.h | 21 u32 hcr; /* 0x1C Horizontal Configuration Register */ member
|
/openbmc/linux/arch/arm64/kvm/ |
H A D | arm.c | 1106 unsigned long *hcr; in vcpu_interrupt_line() local 1113 hcr = vcpu_hcr(vcpu); in vcpu_interrupt_line() 1115 set = test_and_set_bit(bit_index, hcr); in vcpu_interrupt_line() 1117 set = test_and_clear_bit(bit_index, hcr); in vcpu_interrupt_line()
|
H A D | mmu.c | 2122 unsigned long hcr = *vcpu_hcr(vcpu); in kvm_set_way_flush() local 2133 if (!(hcr & HCR_TVM)) { in kvm_set_way_flush() 2137 *vcpu_hcr(vcpu) = hcr | HCR_TVM; in kvm_set_way_flush()
|