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Searched refs:h_misr (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/include/hw/intc/
H A Darm_gic_common.h122 uint32_t h_misr[GIC_NCPU]; member
/openbmc/qemu/hw/intc/
H A Darm_gic_common.c85 VMSTATE_UINT32_ARRAY(h_misr, GICState, GIC_NCPU),
327 s->h_misr[i] = 0; in arm_gic_common_reset_hold()
H A Darm_gic.c330 s->h_misr[cpu] = value; in gic_compute_misr()
340 maint_level = (s->h_hcr[cpu] & R_GICH_HCR_EN_MASK) && s->h_misr[cpu]; in gic_update_maintenance()
1923 *data = s->h_misr[cpu]; in gic_hyp_read()