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Searched refs:gt_dbg (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/i915/gt/
H A Dintel_gt_print.h25 #define gt_dbg(_gt, _fmt, ...) \ macro
37 gt_dbg(_gt, _fmt, ##__VA_ARGS__); \
H A Dintel_gt.c259 gt_dbg(gt, "EIR stuck: 0x%08x, masking\n", eir); in intel_gt_clear_error_registers()
293 gt_dbg(gt, "Unexpected fault\n" in gen6_check_faults()
329 gt_dbg(gt, "Unexpected fault\n" in xehp_check_faults()
370 gt_dbg(gt, "Unexpected fault\n" in gen8_check_faults()
909 gt_dbg(gt, "Setting up %s\n", gt->name); in intel_gt_probe_all()
934 gt_dbg(gt, "Setting up %s\n", gt->name); in intel_gt_probe_all()
H A Dintel_gt_irq.c399 gt_dbg(gt, "Command parser error, gt_iir 0x%08x\n", gt_iir); in gen6_gt_irq_handler()
/openbmc/linux/drivers/gpu/drm/i915/gt/uc/
H A Dintel_uc.c90 gt_dbg(gt, "enable_guc=%d (guc:%s submission:%s huc:%s slpc:%s)\n", in __confirm_options()
295 gt_dbg(gt, "Failed to fetch GuC fw (%pe) disabling HuC\n", ERR_PTR(err)); in __uc_fetch_firmwares()
301 gt_dbg(gt, "Failed to fetch GuC fw (%pe) disabling GSC\n", ERR_PTR(err)); in __uc_fetch_firmwares()
520 gt_dbg(gt, "GuC fw load failed (%pe) will reset and retry %d more time(s)\n", in __uc_init_hw()
H A Dselftest_guc_multi_lrc.c122 gt_dbg(gt, "Not enough engines in class: %d\n", class); in __intel_guc_multi_lrc_basic()
H A Dintel_uc_fw.c57 gt_dbg(__uc_fw_to_gt(uc_fw), "%s firmware -> %s\n", in intel_uc_fw_change_status()
1242 gt_dbg(__uc_fw_to_gt(uc_fw), "%s fw pin-pages failed %pe\n", in intel_uc_fw_init()
1249 gt_dbg(__uc_fw_to_gt(uc_fw), "%s fw rsa data creation failed %pe\n", in intel_uc_fw_init()