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Searched refs:gate_reg (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/clk/altera/
H A Dclk-arria10.c36 u16 gate_reg; member
87 if (!enable && plat->gate_reg) in socfpga_a10_clk_endisable()
88 clrbits_le32(plat->regs + plat->gate_reg, BIT(plat->gate_bit)); in socfpga_a10_clk_endisable()
101 if (enable && plat->gate_reg) in socfpga_a10_clk_endisable()
102 setbits_le32(plat->regs + plat->gate_reg, BIT(plat->gate_bit)); in socfpga_a10_clk_endisable()
340 plat->gate_reg = gatereg[0]; in socfpga_a10_ofdata_to_platdata()
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mtk.h105 u32 gate_reg; member
119 .gate_reg = _reg, \
H A Dclk-mtk.c335 val = readl(priv->base + mux->gate_reg); in mtk_topckgen_enable()
337 writel(val, priv->base + mux->gate_reg); in mtk_topckgen_enable()
363 val = readl(priv->base + mux->gate_reg); in mtk_topckgen_disable()
365 writel(val, priv->base + mux->gate_reg); in mtk_topckgen_disable()