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/openbmc/u-boot/drivers/clk/
H A Dclk_stm32h7.c501 u32 divm1, divn1, divp1, divq1, divr1, fracn1; in stm32_get_PLL1_rate() local
541 fracn1 = readl(&regs->pll1fracr) & RCC_PLL1DIVR_DIVR1_MASK; in stm32_get_PLL1_rate()
542 fracn1 = fracn1 & RCC_PLL1DIVR_DIVR1_SHIFT; in stm32_get_PLL1_rate()
545 rate = (pllsrc * fracn1) / (divm1 * 8192); in stm32_get_PLL1_rate()
550 __func__, fracn1, vco, rate); in stm32_get_PLL1_rate()