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Searched refs:fpga (Results 1 – 25 of 203) sorted by relevance

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/openbmc/u-boot/board/gdsys/common/
H A Dcmd_ioloop.c55 static void io_check_status(unsigned int fpga, u16 status, bool silent) in io_check_status() argument
62 FPGA_SET_REG(fpga, ep.rx_tx_status, status); in io_check_status()
67 FPGA_SET_REG(fpga, ep.rx_tx_status, status); in io_check_status()
88 static void io_send(unsigned int fpga, unsigned int size) in io_send() argument
99 FPGA_SET_REG(fpga, ep.transmit_data, *p++); in io_send()
102 FPGA_SET_REG(fpga, ep.transmit_data, k); in io_send()
104 FPGA_SET_REG(fpga, ep.rx_tx_control, in io_send()
110 static void io_receive(unsigned int fpga) in io_receive() argument
115 FPGA_GET_REG(fpga, ep.rx_tx_status, &rx_tx_status); in io_receive()
123 FPGA_GET_REG(fpga, ep.receive_data, &rx); in io_receive()
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H A Dihs_mdio.c26 static inline u16 read_reg(struct udevice *fpga, uint base, uint addr) in read_reg() argument
31 regmap_init_mem(fpga, &map); in read_reg()
37 static inline void write_reg(struct udevice *fpga, uint base, uint addr, in write_reg() argument
43 regmap_init_mem(fpga, &map); in write_reg()
54 FPGA_GET_REG(info->fpga, mdio.control, &val); in read_control()
56 val = read_reg(info->fpga, info->base, REG_MDIO_CONTROL); in read_control()
64 FPGA_SET_REG(info->fpga, mdio.control, val); in write_control()
66 write_reg(info->fpga, info->base, REG_MDIO_CONTROL, val); in write_control()
73 FPGA_SET_REG(info->fpga, mdio.address_data, val); in write_addr_data()
75 write_reg(info->fpga, info->base, REG_MDIO_ADDR_DATA, val); in write_addr_data()
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/openbmc/linux/Documentation/driver-api/fpga/
H A Dfpga-region.rst16 Currently the only layer above fpga-region.c in the kernel is the Device Tree
17 support (of-fpga-region.c) described in [#f1]_. The DT support layer uses regions
22 An fpga-region can be set up to know the following things:
42 .. [#f1] ../devicetree/bindings/fpga/fpga-region.txt
43 .. [#f2] ../../drivers/fpga/of-fpga-region.c
81 .. kernel-doc:: include/linux/fpga/fpga-region.h
84 .. kernel-doc:: include/linux/fpga/fpga-region.h
87 .. kernel-doc:: drivers/fpga/fpga-region.c
90 .. kernel-doc:: drivers/fpga/fpga-region.c
93 .. kernel-doc:: drivers/fpga/fpga-region.c
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H A Dfpga-bridge.rst15 .. kernel-doc:: include/linux/fpga/fpga-bridge.h
18 .. kernel-doc:: include/linux/fpga/fpga-bridge.h
21 .. kernel-doc:: drivers/fpga/fpga-bridge.c
24 .. kernel-doc:: drivers/fpga/fpga-bridge.c
H A Dfpga-programming.rst34 #include <linux/fpga/fpga-mgr.h>
35 #include <linux/fpga/fpga-region.h>
92 .. kernel-doc:: drivers/fpga/fpga-region.c
97 .. kernel-doc:: include/linux/fpga/fpga-mgr.h
100 .. kernel-doc:: include/linux/fpga/fpga-mgr.h
103 .. kernel-doc:: drivers/fpga/fpga-mgr.c
106 .. kernel-doc:: drivers/fpga/fpga-mgr.c
H A Dfpga-mgr.rst143 .. kernel-doc:: include/linux/fpga/fpga-mgr.h
146 .. kernel-doc:: include/linux/fpga/fpga-mgr.h
149 .. kernel-doc:: include/linux/fpga/fpga-mgr.h
152 .. kernel-doc:: include/linux/fpga/fpga-mgr.h
155 .. kernel-doc:: drivers/fpga/fpga-mgr.c
158 .. kernel-doc:: drivers/fpga/fpga-mgr.c
161 .. kernel-doc:: drivers/fpga/fpga-mgr.c
164 .. kernel-doc:: drivers/fpga/fpga-mgr.c
167 .. kernel-doc:: drivers/fpga/fpga-mgr.c
H A Dindex.rst11 fpga-mgr
12 fpga-bridge
13 fpga-region
14 fpga-programming
/openbmc/u-boot/drivers/fpga/
H A Daltera.c102 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__); in altera_load() local
104 if (!fpga) in altera_load()
108 __func__, fpga->name); in altera_load()
109 if (fpga->load) in altera_load()
110 return fpga->load(desc, buf, bsize); in altera_load()
116 const struct altera_fpga *fpga = altera_desc_to_fpga(desc, __func__); in altera_dump() local
118 if (!fpga) in altera_dump()
122 __func__, fpga->name); in altera_dump()
123 if (fpga->dump) in altera_dump()
124 return fpga->dump(desc, buf, bsize); in altera_dump()
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/openbmc/u-boot/board/gdsys/a38x/
H A Dhydra.c18 static struct ihs_fpga *fpga; variable
22 return fpga; in get_fpga()
27 u32 versions = readl(&fpga->versions); in print_hydra_version()
28 u32 fpga_version = readl(&fpga->fpga_version); in print_hydra_version()
32 printf("FPGA%u: mapped to %p\n ", index, fpga); in print_hydra_version()
82 fpga = pci_map_bar(devno, PCI_BASE_ADDRESS_0, in hydra_initialize()
98 if (!fpga) in do_hydrate()
104 writel(REFL_PATTERN, &fpga->reflection_low); in do_hydrate()
105 res = readl(&fpga->reflection_low); in do_hydrate()
109 writel(REFL_PATTERN_INV, &fpga->reflection_low); in do_hydrate()
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/openbmc/linux/Documentation/devicetree/bindings/board/
H A Dfsl-board.txt27 "fsl,<board>-fpga", "fsl,fpga-pixis", or
28 "fsl,<board>-fpga", "fsl,fpga-qixis"
37 compatible = "fsl,p1022ds-fpga", "fsl,fpga-ngpixis";
46 compatible = "fsl,ls2080ardb-fpga", "fsl,fpga-qixis";
58 "fsl,<board>-fpga", "fsl,fpga-qixis-i2c"
62 fpga: fpga@66 {
63 compatible = "fsl,bsc9132qds-fpga", "fsl,fpga-qixis-i2c";
/openbmc/u-boot/drivers/misc/
H A Dgdsys_soc.c18 struct udevice *fpga; member
26 int gdsys_soc_get_fpga(struct udevice *child, struct udevice **fpga) in gdsys_soc_get_fpga() argument
42 *fpga = bus_priv->fpga; in gdsys_soc_get_fpga()
50 struct udevice *fpga; in gdsys_soc_probe() local
52 &fpga); in gdsys_soc_probe()
63 priv->fpga = fpga; in gdsys_soc_probe()
/openbmc/linux/drivers/watchdog/
H A Dpika_wdt.c50 void __iomem *fpga; member
80 unsigned reset = in_be32(pikawdt_private.fpga + 0x14); in pikawdt_reset()
83 out_be32(pikawdt_private.fpga + 0x14, reset); in pikawdt_reset()
229 void __iomem *fpga; in pikawdt_init() local
239 pikawdt_private.fpga = of_iomap(np, 0); in pikawdt_init()
241 if (pikawdt_private.fpga == NULL) { in pikawdt_init()
246 ident.firmware_version = in_be32(pikawdt_private.fpga + 0x1c) & 0xffff; in pikawdt_init()
256 fpga = of_iomap(np, 0); in pikawdt_init()
258 if (fpga == NULL) { in pikawdt_init()
268 post1 = in_be32(fpga + 0x40); in pikawdt_init()
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/openbmc/u-boot/board/gdsys/mpc8308/
H A Dstrider.c61 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data) in fpga_set_reg() argument
65 switch (fpga) { in fpga_set_reg()
70 res = mclink_send(fpga - 1, regoff, data); in fpga_set_reg()
82 int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data) in fpga_get_reg() argument
86 switch (fpga) { in fpga_get_reg()
91 if (fpga > mclink_fpgacount) in fpga_get_reg()
93 res = mclink_receive(fpga - 1, regoff, data); in fpga_get_reg()
347 int mpc8308_get_fpga_done(unsigned fpga) in mpc8308_get_fpga_done() argument
425 unsigned fpga; member
444 FPGA_SET_REG(fpga_mii->fpga, gpio.set, GPIO_MDIO); in mii_mdio_active()
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H A Dhrcon.c58 int fpga_set_reg(u32 fpga, u16 *reg, off_t regoff, u16 data) in fpga_set_reg() argument
62 switch (fpga) { in fpga_set_reg()
67 res = mclink_send(fpga - 1, regoff, data); in fpga_set_reg()
79 int fpga_get_reg(u32 fpga, u16 *reg, off_t regoff, u16 *data) in fpga_get_reg() argument
83 switch (fpga) { in fpga_get_reg()
88 if (fpga > mclink_fpgacount) in fpga_get_reg()
90 res = mclink_receive(fpga - 1, regoff, data); in fpga_get_reg()
292 int mpc8308_get_fpga_done(unsigned fpga) in mpc8308_get_fpga_done() argument
370 unsigned fpga; member
389 FPGA_SET_REG(fpga_mii->fpga, gpio.set, GPIO_MDIO); in mii_mdio_active()
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/openbmc/linux/arch/powerpc/platforms/44x/
H A Dwarp.c57 void __iomem *fpga; in warp_post_info() local
65 fpga = of_iomap(np, 0); in warp_post_info()
67 if (fpga == NULL) in warp_post_info()
70 post1 = in_be32(fpga + 0x40); in warp_post_info()
71 post2 = in_be32(fpga + 0x44); in warp_post_info()
73 iounmap(fpga); in warp_post_info()
244 static inline void pika_dtm_check_fan(void __iomem *fpga) in pika_dtm_check_fan() argument
247 u32 fan = in_be32(fpga + 0x34) & (1 << 14); in pika_dtm_check_fan()
257 static int pika_dtm_thread(void __iomem *fpga) in pika_dtm_thread() argument
286 out_be32(fpga + 0x20, temp); in pika_dtm_thread()
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/openbmc/u-boot/cmd/
H A Dfpgad.c31 unsigned int fpga; in do_fpga_md() local
41 fpga = dp_last_fpga; in do_fpga_md()
52 fpga = simple_strtoul(argv[1], NULL, 16); in do_fpga_md()
73 fpga_get_reg(fpga, in do_fpga_md()
74 (u16 *)fpga_ptr[fpga] + addr in do_fpga_md()
90 dp_last_fpga = fpga; in do_fpga_md()
/openbmc/linux/drivers/fpga/
H A DMakefile7 obj-$(CONFIG_FPGA) += fpga-mgr.o
17 obj-$(CONFIG_FPGA_MGR_TS73XX) += ts73xx-fpga.o
19 obj-$(CONFIG_FPGA_MGR_ZYNQ_FPGA) += zynq-fpga.o
20 obj-$(CONFIG_FPGA_MGR_ZYNQMP_FPGA) += zynqmp-fpga.o
21 obj-$(CONFIG_FPGA_MGR_VERSAL_FPGA) += versal-fpga.o
32 obj-$(CONFIG_FPGA_BRIDGE) += fpga-bridge.o
38 obj-$(CONFIG_FPGA_REGION) += fpga-region.o
39 obj-$(CONFIG_OF_FPGA_REGION) += of-fpga-region.o
/openbmc/u-boot/doc/uImage.FIT/
H A Dmulti-with-fpga.its9 description = "Configuration to load fpga before Kernel";
25 fpga {
28 type = "fpga";
61 description = "Linux with fpga";
64 fpga = "fpga";
/openbmc/openbmc/meta-amd/meta-ethanolx/recipes-amd/amd-fpga/
H A Dip-to-fpga.bb8 SRC_URI = " file://ip-to-fpga.sh \
9 file://ip-to-fpga.service \
18 SYSTEMD_SERVICE:${PN} = "ip-to-fpga.service"
22 install -m 0755 ${S}/ip-to-fpga.sh ${D}${bindir}/
25 install -m 0644 ${S}/ip-to-fpga.service ${D}${systemd_system_unitdir}
/openbmc/linux/arch/powerpc/boot/
H A Debony.c38 u8 *fpga; in ebony_flashsel_fixup() local
45 if (getprop(devp, "virtual-reg", &fpga, sizeof(fpga)) != sizeof(fpga)) in ebony_flashsel_fixup()
49 fpga_reg0 = in_8(fpga); in ebony_flashsel_fixup()
/openbmc/linux/arch/powerpc/boot/dts/fsl/
H A Dgef_ppc9a.dts80 fpga@4,0 {
81 compatible = "gef,ppc9a-fpga-regs";
86 compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
87 "gef,fpga-wdt";
94 compatible = "gef,ppc9a-fpga-wdt", "gef,fpga-wdt-1.00",
95 "gef,fpga-wdt";
104 compatible = "gef,ppc9a-fpga-pic", "gef,fpga-pic-1.00";
H A Dgef_sbc310.dts77 fpga@4,0 {
78 compatible = "gef,fpga-regs";
83 compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00",
84 "gef,fpga-wdt";
91 compatible = "gef,sbc310-fpga-wdt", "gef,fpga-wdt-1.00",
92 "gef,fpga-wdt";
101 compatible = "gef,sbc310-fpga-pic", "gef,fpga-pic";
/openbmc/linux/Documentation/devicetree/bindings/fpga/
H A Daltera-hps2fpga-bridge.txt12 See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings.
15 fpga_bridge0: fpga-bridge@ff400000 {
23 fpga_bridge1: fpga-bridge@ff500000 {
31 fpga_bridge2: fpga-bridge@ff600000 {
H A Dfpga-region.txt167 - compatible : should contain "fpga-region"
168 - fpga-mgr : should contain a phandle to an FPGA Manager. Child FPGA Regions
169 inherit this property from their ancestor regions. An fpga-mgr property
180 - fpga-bridges : should contain a list of phandles to FPGA Bridges that must be
183 If the fpga-region is the child of an fpga-bridge, the list should not
185 - partial-fpga-config : boolean, set if partial reconfiguration is to be done,
187 - external-fpga-config : boolean, set if the FPGA has already been configured
189 - encrypted-fpga-config : boolean, set if the bitstream is encrypted
200 In the example below, when an overlay is applied targeting fpga-region0,
204 fpga-bridges property. During programming, these bridges are disabled, the
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H A Dintel-stratix10-soc-fpga-mgr.txt7 - compatible : should contain "intel,stratix10-soc-fpga-mgr" or
8 "intel,agilex-soc-fpga-mgr"
14 fpga_mgr: fpga-mgr {
15 compatible = "intel,stratix10-soc-fpga-mgr";

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