Searched refs:fp_vert_regs (Results 1 – 5 of 5) sorted by relevance
314 regp->fp_vert_regs[FP_DISPLAY_END] = output_mode->vdisplay - 1; in nv04_dfp_mode_set()315 regp->fp_vert_regs[FP_TOTAL] = output_mode->vtotal - 1; in nv04_dfp_mode_set()316 regp->fp_vert_regs[FP_CRTC] = output_mode->vtotal - 5 - 1; in nv04_dfp_mode_set()317 regp->fp_vert_regs[FP_SYNC_START] = output_mode->vsync_start - 1; in nv04_dfp_mode_set()318 regp->fp_vert_regs[FP_SYNC_END] = output_mode->vsync_end - 1; in nv04_dfp_mode_set()319 regp->fp_vert_regs[FP_VALID_START] = 0; in nv04_dfp_mode_set()320 regp->fp_vert_regs[FP_VALID_END] = output_mode->vdisplay - 1; in nv04_dfp_mode_set()412 regp->fp_vert_regs[FP_VALID_START] += diff / 2; in nv04_dfp_mode_set()413 regp->fp_vert_regs[FP_VALID_END] -= diff / 2; in nv04_dfp_mode_set()
573 regs->fp_vert_regs[FP_VALID_START] = vmargin; in nv17_ctv_update_rescaler()574 regs->fp_vert_regs[FP_VALID_END] = output_mode->vdisplay - vmargin - 1; in nv17_ctv_update_rescaler()586 regs->fp_vert_regs[FP_VALID_START]); in nv17_ctv_update_rescaler()588 regs->fp_vert_regs[FP_VALID_END]); in nv17_ctv_update_rescaler()
542 regs->fp_vert_regs[FP_DISPLAY_END] = output_mode->vdisplay - 1; in nv17_tv_mode_set()543 regs->fp_vert_regs[FP_TOTAL] = output_mode->vtotal - 1; in nv17_tv_mode_set()544 regs->fp_vert_regs[FP_SYNC_START] = in nv17_tv_mode_set()546 regs->fp_vert_regs[FP_SYNC_END] = output_mode->vsync_end - 1; in nv17_tv_mode_set()547 regs->fp_vert_regs[FP_CRTC] = output_mode->vdisplay - 1; in nv17_tv_mode_set()
57 uint32_t fp_vert_regs[7]; member
429 regp->fp_vert_regs[i] = NVReadRAMDAC(dev, head, ramdac_reg); in nv_save_state_ramdac()507 NVWriteRAMDAC(dev, head, ramdac_reg, regp->fp_vert_regs[i]); in nv_load_state_ramdac()