| /openbmc/qemu/target/hexagon/ |
| H A D | arch.c | 231 SOFTFLOAT_TEST_FLAG(float_flag_divbyzero, FPDBZF, FPDBZE); in arch_fpop_end()
278 float_raise(float_flag_divbyzero, fp_status); in arch_sf_recip_common()
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| /openbmc/qemu/target/arm/tcg/ |
| H A D | vfp_helper.c | 82 if (host_bits & float_flag_divbyzero) { in vfp_exceptbits_from_host()
706 float_raise(float_flag_divbyzero, fpst); in HELPER()
759 float_raise(float_flag_divbyzero, fpst); in do_recpe_f32()
818 float_raise(float_flag_divbyzero, fpst); in HELPER()
959 float_raise(float_flag_divbyzero, s); in HELPER()
1008 float_raise(float_flag_divbyzero, s); in do_rsqrte_f32()
1070 float_raise(float_flag_divbyzero, s); in HELPER()
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| /openbmc/qemu/include/fpu/ |
| H A D | softfloat-types.h | 153 float_flag_divbyzero = 0x0002, enumerator
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| /openbmc/qemu/target/openrisc/ |
| H A D | fpu_helper.c | 38 if (fexcp & float_flag_divbyzero) { in ieee_ex_to_openrisc()
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| /openbmc/qemu/target/tricore/ |
| H A D | fpu_helper.c | 47 | float_flag_divbyzero in f_get_excp_flags()
107 if (flags & float_flag_divbyzero) { in f_update_psw_flags()
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| /openbmc/qemu/linux-user/arm/ |
| H A D | cpu_loop.c | 256 if (rc & float_flag_divbyzero) { in emulate_arm_fpa11()
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| /openbmc/qemu/target/m68k/ |
| H A D | fpu_helper.c | 180 if (host_bits & float_flag_divbyzero) { in cpu_m68k_exceptbits_from_host()
204 host_bits |= float_flag_divbyzero; in cpu_m68k_exceptbits_to_host()
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| H A D | softfloat.c | 256 float_raise(float_flag_divbyzero, status); in floatx80_lognp1()
451 float_raise(float_flag_divbyzero, status); in floatx80_logn()
614 float_raise(float_flag_divbyzero, status); in floatx80_log10()
671 float_raise(float_flag_divbyzero, status); in floatx80_log2()
2251 float_raise(float_flag_divbyzero, status); in floatx80_atanh()
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| /openbmc/qemu/target/rx/ |
| H A D | op_helper.c | 89 if (xcpt & float_flag_divbyzero) { in update_fpsw()
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| /openbmc/qemu/target/riscv/ |
| H A D | fpu_helper.c | 34 hard |= (soft & float_flag_divbyzero) ? FPEXC_DZ : 0; in riscv_cpu_get_fflags()
47 soft |= (hard & FPEXC_DZ) ? float_flag_divbyzero : 0; in riscv_cpu_set_fflags()
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| H A D | vector_helper.c | 3873 s->float_exception_flags |= float_flag_divbyzero; in frsqrt7_h()
3913 s->float_exception_flags |= float_flag_divbyzero; in frsqrt7_s()
3953 s->float_exception_flags |= float_flag_divbyzero; in frsqrt7_d()
4074 s->float_exception_flags |= float_flag_divbyzero; in frec7_h()
4106 s->float_exception_flags |= float_flag_divbyzero; in frec7_s()
4138 s->float_exception_flags |= float_flag_divbyzero; in frec7_d()
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| /openbmc/qemu/target/alpha/ |
| H A D | fpu_helper.c | 49 ret |= CONVERT_BIT(exc, float_flag_divbyzero, FPCR_DZE); in soft_to_fpcr_exc()
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| /openbmc/qemu/target/sh4/ |
| H A D | op_helper.c | 228 if (xcpt & float_flag_divbyzero) { in update_fpscr()
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| /openbmc/qemu/target/xtensa/ |
| H A D | fpu_helper.c | 55 { XTENSA_FP_Z, float_flag_divbyzero, },
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| /openbmc/qemu/target/microblaze/ |
| H A D | op_helper.c | 137 if (flags & float_flag_divbyzero) { in update_fpu_flags()
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| /openbmc/qemu/target/hppa/ |
| H A D | fpu_helper.c | 110 hard_exp |= CONVERT_BIT(soft_exp, float_flag_divbyzero, R_FPSR_ENA_Z_MASK); in update_fr0_op()
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| /openbmc/qemu/tests/fp/ |
| H A D | fp-test.c | 800 qemu_init_flags |= float_flag_divbyzero; in set_init_flags()
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| H A D | wrap.c.inc | 48 if (qflags & float_flag_divbyzero) {
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| /openbmc/qemu/target/sparc/ |
| H A D | fop_helper.c | 66 if (status & float_flag_divbyzero) { in check_ieee_exceptions()
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| /openbmc/qemu/target/i386/tcg/ |
| H A D | fpu_helper.c | 214 (new_flags & float_flag_divbyzero ? FPUS_ZE : 0) | in merge_exception_flags()
2209 float_raise(float_flag_divbyzero, &env->fp_status); in helper_fyl2x()
3258 (mxcsr & FPUS_ZE ? float_flag_divbyzero : 0) | in update_mxcsr_status()
3276 (flags & float_flag_divbyzero ? FPUS_ZE : 0) | in update_mxcsr_from_sse_status()
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| /openbmc/qemu/target/ppc/ |
| H A D | fpu_helper.c | 533 if (unlikely(flags & float_flag_divbyzero)) { in div_flags_handler()
741 if (unlikely(flags & float_flag_divbyzero)) { \ in FPU_FSQRT()
761 if (unlikely(flags & float_flag_divbyzero)) { \
1734 if (unlikely(tstat.float_exception_flags & float_flag_divbyzero)) { \
1775 if (unlikely(tstat.float_exception_flags & float_flag_divbyzero)) { in helper_xsdivqp()
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| /openbmc/qemu/target/loongarch/tcg/ |
| H A D | fpu_helper.c | 56 if (xcpt & float_flag_divbyzero) { in ieee_ex_to_loongarch()
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| /openbmc/qemu/target/s390x/tcg/ |
| H A D | fpu_helper.c | 50 s390_exc |= (exc & float_flag_divbyzero) ? S390_IEEE_MASK_DIVBYZERO : 0; in s390_softfloat_exc_to_ieee()
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| /openbmc/qemu/fpu/ |
| H A D | softfloat-parts.c.inc | 796 float_raise(float_flag_divbyzero, s);
1710 float_raise(float_flag_divbyzero, s);
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| /openbmc/qemu/target/mips/tcg/ |
| H A D | fpu_helper.c | 192 if (ieee_xcpt & float_flag_divbyzero) { in ieee_to_mips_xcpt()
|