Home
last modified time | relevance | path

Searched refs:fieldoffset (Results 1 – 8 of 8) sorted by relevance

/openbmc/qemu/target/arm/
H A Dhelper.c60 (*(uint32_t *)((char *)(env) + (ri)->fieldoffset)) in raw_write()
62 (*(uint64_t *)((char *)(env) + (ri)->fieldoffset))
66 assert(ri->fieldoffset); in raw_ptr()
79 assert(ri->fieldoffset); in read_raw_cp_reg()
97 return (char *)env + ri->fieldoffset; in write_raw_cp_reg()
149 ri->fieldoffset || in write_cpustate_to_list()
441 .fieldoffset = offsetof(CPUARMState, cp15.fcseidr_ns),
446 .fieldoffset = offsetof(CPUARMState, cp15.fcseidr_s),
463 .fieldoffset = offsetof(CPUARMState, cp15.contextidr_el[1]),
469 .fieldoffset
[all...]
H A Dcpregs-pmu.c1025 .fieldoffset = offsetoflow32(CPUARMState, cp15.c9_pmcnten),
1034 .fieldoffset = offsetof(CPUARMState, cp15.c9_pmcnten), .resetvalue = 0,
1038 .fieldoffset = offsetoflow32(CPUARMState, cp15.c9_pmcnten),
1048 .fieldoffset = offsetof(CPUARMState, cp15.c9_pmcnten),
1052 .fieldoffset = offsetoflow32(CPUARMState, cp15.c9_pmovsr),
1062 .fieldoffset = offsetof(CPUARMState, cp15.c9_pmovsr),
1079 .fieldoffset = offsetoflow32(CPUARMState, cp15.c9_pmselr),
1086 .fieldoffset = offsetof(CPUARMState, cp15.c9_pmselr),
1093 .fieldoffset = offsetof(CPUARMState, cp15.c15_ccnt),
1108 .fieldoffset = offsetof(CPUARMState, cp15.pmccfiltr_el0),
[all …]
H A Ddebug_helper.c974 .fieldoffset = offsetof(CPUARMState, cp15.mdscr_el1),
1053 .fieldoffset = offsetof(CPUARMState, cp15.mdscr_el1), },
1065 .fieldoffset = offsetof(CPUARMState, cp15.oslsr_el1) },
1072 .fieldoffset = offsetof(CPUARMState, cp15.osdlr_el1) },
1106 .fieldoffset = offsetof(CPUARMState, cp15.dbgclaim) },
1283 .fieldoffset = offsetof(CPUARMState, cp15.dbgbvr[i]), in define_debug_regs()
1290 .fieldoffset = offsetof(CPUARMState, cp15.dbgbcr[i]), in define_debug_regs()
1307 .fieldoffset = offsetof(CPUARMState, cp15.dbgwvr[i]), in define_debug_regs()
1314 .fieldoffset = offsetof(CPUARMState, cp15.dbgwcr[i]), in define_debug_regs()
H A Dcpregs.h984 * fieldoffset is non-zero, the reset value of the register.
993 ptrdiff_t fieldoffset; /* offsetof(CPUARMState, field) */
999 * with a given security state is copied to fieldoffset which is used from
1002 * It is expected that register definitions use either fieldoffset or
1019 * by fieldoffset.
1025 * by fieldoffset.
1045 * by writing resetvalue to the field specified in fieldoffset. If
1046 * fieldoffset is 0 then no reset will be done.
1100 /* CPReadFn that just reads the value from ri->fieldoffset */
1103 /* CPWriteFn that just writes the value to ri->fieldoffset */ in arm_cpreg_encoding_in_idspace()
926 ptrdiff_t fieldoffset; /* offsetof(CPUARMState, field) */ global() member
[all...]
H A Dcpu.c197 if (ri->fieldoffset) { in cp_reg_reset()
/openbmc/qemu/target/arm/tcg/
H A Dcpu32.c194 .fieldoffset = offsetof(CPUARMState, cp15.ifar_ns), in arm1026_initfn()
390 .fieldoffset = offsetof(CPUARMState, cp15.c15_power_control) },
393 .fieldoffset = offsetof(CPUARMState, cp15.c15_diagnostic) },
396 .fieldoffset = offsetof(CPUARMState, cp15.c15_power_diagnostic) },
H A Dtranslate.c1895 tcg_gen_ld_i64(tmp64, tcg_env, ri->fieldoffset); in disas_iwmmxt_insn()
1914 tmp = load_cpu_offset(ri->fieldoffset); in disas_iwmmxt_insn()
1944 tcg_gen_st_i64(tmp64, tcg_env, ri->fieldoffset); in disas_iwmmxt_insn()
1954 store_cpu_offset(tmp, ri->fieldoffset, 4); in disas_iwmmxt_insn()
H A Dtranslate-a64.c3111 tcg_gen_ld_i64(tcg_rt, tcg_env, ri->fieldoffset); in gen_compare_and_swap_pair()
3123 tcg_gen_st_i64(tcg_rt, tcg_env, ri->fieldoffset);