1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Xilinx Zynq MPSoC Firmware layer
4 *
5 * Copyright (C) 2014-2022 Xilinx, Inc.
6 *
7 * Michal Simek <michal.simek@amd.com>
8 * Davorin Mista <davorin.mista@aggios.com>
9 * Jolly Shah <jollys@xilinx.com>
10 * Rajan Vaja <rajanv@xilinx.com>
11 */
12
13 #include <linux/arm-smccc.h>
14 #include <linux/compiler.h>
15 #include <linux/device.h>
16 #include <linux/init.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
19 #include <linux/of.h>
20 #include <linux/of_platform.h>
21 #include <linux/platform_device.h>
22 #include <linux/slab.h>
23 #include <linux/uaccess.h>
24 #include <linux/hashtable.h>
25
26 #include <linux/firmware/xlnx-zynqmp.h>
27 #include <linux/firmware/xlnx-event-manager.h>
28 #include "zynqmp-debug.h"
29
30 /* Max HashMap Order for PM API feature check (1<<7 = 128) */
31 #define PM_API_FEATURE_CHECK_MAX_ORDER 7
32
33 /* CRL registers and bitfields */
34 #define CRL_APB_BASE 0xFF5E0000U
35 /* BOOT_PIN_CTRL- Used to control the mode pins after boot */
36 #define CRL_APB_BOOT_PIN_CTRL (CRL_APB_BASE + (0x250U))
37 /* BOOT_PIN_CTRL_MASK- out_val[11:8], out_en[3:0] */
38 #define CRL_APB_BOOTPIN_CTRL_MASK 0xF0FU
39
40 /* IOCTL/QUERY feature payload size */
41 #define FEATURE_PAYLOAD_SIZE 2
42
43 /* Firmware feature check version mask */
44 #define FIRMWARE_VERSION_MASK GENMASK(15, 0)
45
46 static bool feature_check_enabled;
47 static DEFINE_HASHTABLE(pm_api_features_map, PM_API_FEATURE_CHECK_MAX_ORDER);
48 static u32 ioctl_features[FEATURE_PAYLOAD_SIZE];
49 static u32 query_features[FEATURE_PAYLOAD_SIZE];
50
51 static struct platform_device *em_dev;
52
53 /**
54 * struct zynqmp_devinfo - Structure for Zynqmp device instance
55 * @dev: Device Pointer
56 * @feature_conf_id: Feature conf id
57 */
58 struct zynqmp_devinfo {
59 struct device *dev;
60 u32 feature_conf_id;
61 };
62
63 /**
64 * struct pm_api_feature_data - PM API Feature data
65 * @pm_api_id: PM API Id, used as key to index into hashmap
66 * @feature_status: status of PM API feature: valid, invalid
67 * @hentry: hlist_node that hooks this entry into hashtable
68 */
69 struct pm_api_feature_data {
70 u32 pm_api_id;
71 int feature_status;
72 struct hlist_node hentry;
73 };
74
75 static const struct mfd_cell firmware_devs[] = {
76 {
77 .name = "zynqmp_power_controller",
78 },
79 };
80
81 /**
82 * zynqmp_pm_ret_code() - Convert PMU-FW error codes to Linux error codes
83 * @ret_status: PMUFW return code
84 *
85 * Return: corresponding Linux error code
86 */
zynqmp_pm_ret_code(u32 ret_status)87 static int zynqmp_pm_ret_code(u32 ret_status)
88 {
89 switch (ret_status) {
90 case XST_PM_SUCCESS:
91 case XST_PM_DOUBLE_REQ:
92 return 0;
93 case XST_PM_NO_FEATURE:
94 return -ENOTSUPP;
95 case XST_PM_NO_ACCESS:
96 return -EACCES;
97 case XST_PM_ABORT_SUSPEND:
98 return -ECANCELED;
99 case XST_PM_MULT_USER:
100 return -EUSERS;
101 case XST_PM_INTERNAL:
102 case XST_PM_CONFLICT:
103 case XST_PM_INVALID_NODE:
104 default:
105 return -EINVAL;
106 }
107 }
108
do_fw_call_fail(u64 arg0,u64 arg1,u64 arg2,u32 * ret_payload)109 static noinline int do_fw_call_fail(u64 arg0, u64 arg1, u64 arg2,
110 u32 *ret_payload)
111 {
112 return -ENODEV;
113 }
114
115 /*
116 * PM function call wrapper
117 * Invoke do_fw_call_smc or do_fw_call_hvc, depending on the configuration
118 */
119 static int (*do_fw_call)(u64, u64, u64, u32 *ret_payload) = do_fw_call_fail;
120
121 /**
122 * do_fw_call_smc() - Call system-level platform management layer (SMC)
123 * @arg0: Argument 0 to SMC call
124 * @arg1: Argument 1 to SMC call
125 * @arg2: Argument 2 to SMC call
126 * @ret_payload: Returned value array
127 *
128 * Invoke platform management function via SMC call (no hypervisor present).
129 *
130 * Return: Returns status, either success or error+reason
131 */
do_fw_call_smc(u64 arg0,u64 arg1,u64 arg2,u32 * ret_payload)132 static noinline int do_fw_call_smc(u64 arg0, u64 arg1, u64 arg2,
133 u32 *ret_payload)
134 {
135 struct arm_smccc_res res;
136
137 arm_smccc_smc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
138
139 if (ret_payload) {
140 ret_payload[0] = lower_32_bits(res.a0);
141 ret_payload[1] = upper_32_bits(res.a0);
142 ret_payload[2] = lower_32_bits(res.a1);
143 ret_payload[3] = upper_32_bits(res.a1);
144 }
145
146 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
147 }
148
149 /**
150 * do_fw_call_hvc() - Call system-level platform management layer (HVC)
151 * @arg0: Argument 0 to HVC call
152 * @arg1: Argument 1 to HVC call
153 * @arg2: Argument 2 to HVC call
154 * @ret_payload: Returned value array
155 *
156 * Invoke platform management function via HVC
157 * HVC-based for communication through hypervisor
158 * (no direct communication with ATF).
159 *
160 * Return: Returns status, either success or error+reason
161 */
do_fw_call_hvc(u64 arg0,u64 arg1,u64 arg2,u32 * ret_payload)162 static noinline int do_fw_call_hvc(u64 arg0, u64 arg1, u64 arg2,
163 u32 *ret_payload)
164 {
165 struct arm_smccc_res res;
166
167 arm_smccc_hvc(arg0, arg1, arg2, 0, 0, 0, 0, 0, &res);
168
169 if (ret_payload) {
170 ret_payload[0] = lower_32_bits(res.a0);
171 ret_payload[1] = upper_32_bits(res.a0);
172 ret_payload[2] = lower_32_bits(res.a1);
173 ret_payload[3] = upper_32_bits(res.a1);
174 }
175
176 return zynqmp_pm_ret_code((enum pm_ret_status)res.a0);
177 }
178
__do_feature_check_call(const u32 api_id,u32 * ret_payload)179 static int __do_feature_check_call(const u32 api_id, u32 *ret_payload)
180 {
181 int ret;
182 u64 smc_arg[2];
183
184 smc_arg[0] = PM_SIP_SVC | PM_FEATURE_CHECK;
185 smc_arg[1] = api_id;
186
187 ret = do_fw_call(smc_arg[0], smc_arg[1], 0, ret_payload);
188 if (ret)
189 ret = -EOPNOTSUPP;
190 else
191 ret = ret_payload[1];
192
193 return ret;
194 }
195
do_feature_check_call(const u32 api_id)196 static int do_feature_check_call(const u32 api_id)
197 {
198 int ret;
199 u32 ret_payload[PAYLOAD_ARG_CNT];
200 struct pm_api_feature_data *feature_data;
201
202 /* Check for existing entry in hash table for given api */
203 hash_for_each_possible(pm_api_features_map, feature_data, hentry,
204 api_id) {
205 if (feature_data->pm_api_id == api_id)
206 return feature_data->feature_status;
207 }
208
209 /* Add new entry if not present */
210 feature_data = kmalloc(sizeof(*feature_data), GFP_ATOMIC);
211 if (!feature_data)
212 return -ENOMEM;
213
214 feature_data->pm_api_id = api_id;
215 ret = __do_feature_check_call(api_id, ret_payload);
216
217 feature_data->feature_status = ret;
218 hash_add(pm_api_features_map, &feature_data->hentry, api_id);
219
220 if (api_id == PM_IOCTL)
221 /* Store supported IOCTL IDs mask */
222 memcpy(ioctl_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
223 else if (api_id == PM_QUERY_DATA)
224 /* Store supported QUERY IDs mask */
225 memcpy(query_features, &ret_payload[2], FEATURE_PAYLOAD_SIZE * 4);
226
227 return ret;
228 }
229 EXPORT_SYMBOL_GPL(zynqmp_pm_feature);
230
231 /**
232 * zynqmp_pm_feature() - Check whether given feature is supported or not and
233 * store supported IOCTL/QUERY ID mask
234 * @api_id: API ID to check
235 *
236 * Return: Returns status, either success or error+reason
237 */
zynqmp_pm_feature(const u32 api_id)238 int zynqmp_pm_feature(const u32 api_id)
239 {
240 int ret;
241
242 if (!feature_check_enabled)
243 return 0;
244
245 ret = do_feature_check_call(api_id);
246
247 return ret;
248 }
249
250 /**
251 * zynqmp_pm_is_function_supported() - Check whether given IOCTL/QUERY function
252 * is supported or not
253 * @api_id: PM_IOCTL or PM_QUERY_DATA
254 * @id: IOCTL or QUERY function IDs
255 *
256 * Return: Returns status, either success or error+reason
257 */
zynqmp_pm_is_function_supported(const u32 api_id,const u32 id)258 int zynqmp_pm_is_function_supported(const u32 api_id, const u32 id)
259 {
260 int ret;
261 u32 *bit_mask;
262
263 /* Input arguments validation */
264 if (id >= 64 || (api_id != PM_IOCTL && api_id != PM_QUERY_DATA))
265 return -EINVAL;
266
267 /* Check feature check API version */
268 ret = do_feature_check_call(PM_FEATURE_CHECK);
269 if (ret < 0)
270 return ret;
271
272 /* Check if feature check version 2 is supported or not */
273 if ((ret & FIRMWARE_VERSION_MASK) == PM_API_VERSION_2) {
274 /*
275 * Call feature check for IOCTL/QUERY API to get IOCTL ID or
276 * QUERY ID feature status.
277 */
278 ret = do_feature_check_call(api_id);
279 if (ret < 0)
280 return ret;
281
282 bit_mask = (api_id == PM_IOCTL) ? ioctl_features : query_features;
283
284 if ((bit_mask[(id / 32)] & BIT((id % 32))) == 0U)
285 return -EOPNOTSUPP;
286 } else {
287 return -ENODATA;
288 }
289
290 return 0;
291 }
292 EXPORT_SYMBOL_GPL(zynqmp_pm_is_function_supported);
293
294 /**
295 * zynqmp_pm_invoke_fn() - Invoke the system-level platform management layer
296 * caller function depending on the configuration
297 * @pm_api_id: Requested PM-API call
298 * @arg0: Argument 0 to requested PM-API call
299 * @arg1: Argument 1 to requested PM-API call
300 * @arg2: Argument 2 to requested PM-API call
301 * @arg3: Argument 3 to requested PM-API call
302 * @ret_payload: Returned value array
303 *
304 * Invoke platform management function for SMC or HVC call, depending on
305 * configuration.
306 * Following SMC Calling Convention (SMCCC) for SMC64:
307 * Pm Function Identifier,
308 * PM_SIP_SVC + PM_API_ID =
309 * ((SMC_TYPE_FAST << FUNCID_TYPE_SHIFT)
310 * ((SMC_64) << FUNCID_CC_SHIFT)
311 * ((SIP_START) << FUNCID_OEN_SHIFT)
312 * ((PM_API_ID) & FUNCID_NUM_MASK))
313 *
314 * PM_SIP_SVC - Registered ZynqMP SIP Service Call.
315 * PM_API_ID - Platform Management API ID.
316 *
317 * Return: Returns status, either success or error+reason
318 */
zynqmp_pm_invoke_fn(u32 pm_api_id,u32 arg0,u32 arg1,u32 arg2,u32 arg3,u32 * ret_payload)319 int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
320 u32 arg2, u32 arg3, u32 *ret_payload)
321 {
322 /*
323 * Added SIP service call Function Identifier
324 * Make sure to stay in x0 register
325 */
326 u64 smc_arg[4];
327 int ret;
328
329 /* Check if feature is supported or not */
330 ret = zynqmp_pm_feature(pm_api_id);
331 if (ret < 0)
332 return ret;
333
334 smc_arg[0] = PM_SIP_SVC | pm_api_id;
335 smc_arg[1] = ((u64)arg1 << 32) | arg0;
336 smc_arg[2] = ((u64)arg3 << 32) | arg2;
337
338 return do_fw_call(smc_arg[0], smc_arg[1], smc_arg[2], ret_payload);
339 }
340
341 static u32 pm_api_version;
342 static u32 pm_tz_version;
343 static u32 pm_family_code;
344 static u32 pm_sub_family_code;
345
zynqmp_pm_register_sgi(u32 sgi_num,u32 reset)346 int zynqmp_pm_register_sgi(u32 sgi_num, u32 reset)
347 {
348 int ret;
349
350 ret = zynqmp_pm_invoke_fn(TF_A_PM_REGISTER_SGI, sgi_num, reset, 0, 0,
351 NULL);
352 if (!ret)
353 return ret;
354
355 /* try old implementation as fallback strategy if above fails */
356 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_REGISTER_SGI, sgi_num,
357 reset, NULL);
358 }
359
360 /**
361 * zynqmp_pm_get_api_version() - Get version number of PMU PM firmware
362 * @version: Returned version value
363 *
364 * Return: Returns status, either success or error+reason
365 */
zynqmp_pm_get_api_version(u32 * version)366 int zynqmp_pm_get_api_version(u32 *version)
367 {
368 u32 ret_payload[PAYLOAD_ARG_CNT];
369 int ret;
370
371 if (!version)
372 return -EINVAL;
373
374 /* Check is PM API version already verified */
375 if (pm_api_version > 0) {
376 *version = pm_api_version;
377 return 0;
378 }
379 ret = zynqmp_pm_invoke_fn(PM_GET_API_VERSION, 0, 0, 0, 0, ret_payload);
380 *version = ret_payload[1];
381
382 return ret;
383 }
384 EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version);
385
386 /**
387 * zynqmp_pm_get_chipid - Get silicon ID registers
388 * @idcode: IDCODE register
389 * @version: version register
390 *
391 * Return: Returns the status of the operation and the idcode and version
392 * registers in @idcode and @version.
393 */
zynqmp_pm_get_chipid(u32 * idcode,u32 * version)394 int zynqmp_pm_get_chipid(u32 *idcode, u32 *version)
395 {
396 u32 ret_payload[PAYLOAD_ARG_CNT];
397 int ret;
398
399 if (!idcode || !version)
400 return -EINVAL;
401
402 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
403 *idcode = ret_payload[1];
404 *version = ret_payload[2];
405
406 return ret;
407 }
408 EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid);
409
410 /**
411 * zynqmp_pm_get_family_info() - Get family info of platform
412 * @family: Returned family code value
413 * @subfamily: Returned sub-family code value
414 *
415 * Return: Returns status, either success or error+reason
416 */
zynqmp_pm_get_family_info(u32 * family,u32 * subfamily)417 static int zynqmp_pm_get_family_info(u32 *family, u32 *subfamily)
418 {
419 u32 ret_payload[PAYLOAD_ARG_CNT];
420 u32 idcode;
421 int ret;
422
423 /* Check is family or sub-family code already received */
424 if (pm_family_code && pm_sub_family_code) {
425 *family = pm_family_code;
426 *subfamily = pm_sub_family_code;
427 return 0;
428 }
429
430 ret = zynqmp_pm_invoke_fn(PM_GET_CHIPID, 0, 0, 0, 0, ret_payload);
431 if (ret < 0)
432 return ret;
433
434 idcode = ret_payload[1];
435 pm_family_code = FIELD_GET(FAMILY_CODE_MASK, idcode);
436 pm_sub_family_code = FIELD_GET(SUB_FAMILY_CODE_MASK, idcode);
437 *family = pm_family_code;
438 *subfamily = pm_sub_family_code;
439
440 return 0;
441 }
442
443 /**
444 * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version
445 * @version: Returned version value
446 *
447 * Return: Returns status, either success or error+reason
448 */
zynqmp_pm_get_trustzone_version(u32 * version)449 static int zynqmp_pm_get_trustzone_version(u32 *version)
450 {
451 u32 ret_payload[PAYLOAD_ARG_CNT];
452 int ret;
453
454 if (!version)
455 return -EINVAL;
456
457 /* Check is PM trustzone version already verified */
458 if (pm_tz_version > 0) {
459 *version = pm_tz_version;
460 return 0;
461 }
462 ret = zynqmp_pm_invoke_fn(PM_GET_TRUSTZONE_VERSION, 0, 0,
463 0, 0, ret_payload);
464 *version = ret_payload[1];
465
466 return ret;
467 }
468
469 /**
470 * get_set_conduit_method() - Choose SMC or HVC based communication
471 * @np: Pointer to the device_node structure
472 *
473 * Use SMC or HVC-based functions to communicate with EL2/EL3.
474 *
475 * Return: Returns 0 on success or error code
476 */
get_set_conduit_method(struct device_node * np)477 static int get_set_conduit_method(struct device_node *np)
478 {
479 const char *method;
480
481 if (of_property_read_string(np, "method", &method)) {
482 pr_warn("%s missing \"method\" property\n", __func__);
483 return -ENXIO;
484 }
485
486 if (!strcmp("hvc", method)) {
487 do_fw_call = do_fw_call_hvc;
488 } else if (!strcmp("smc", method)) {
489 do_fw_call = do_fw_call_smc;
490 } else {
491 pr_warn("%s Invalid \"method\" property: %s\n",
492 __func__, method);
493 return -EINVAL;
494 }
495
496 return 0;
497 }
498
499 /**
500 * zynqmp_pm_query_data() - Get query data from firmware
501 * @qdata: Variable to the zynqmp_pm_query_data structure
502 * @out: Returned output value
503 *
504 * Return: Returns status, either success or error+reason
505 */
zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata,u32 * out)506 int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out)
507 {
508 int ret;
509
510 ret = zynqmp_pm_invoke_fn(PM_QUERY_DATA, qdata.qid, qdata.arg1,
511 qdata.arg2, qdata.arg3, out);
512
513 /*
514 * For clock name query, all bytes in SMC response are clock name
515 * characters and return code is always success. For invalid clocks,
516 * clock name bytes would be zeros.
517 */
518 return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret;
519 }
520 EXPORT_SYMBOL_GPL(zynqmp_pm_query_data);
521
522 /**
523 * zynqmp_pm_clock_enable() - Enable the clock for given id
524 * @clock_id: ID of the clock to be enabled
525 *
526 * This function is used by master to enable the clock
527 * including peripherals and PLL clocks.
528 *
529 * Return: Returns status, either success or error+reason
530 */
zynqmp_pm_clock_enable(u32 clock_id)531 int zynqmp_pm_clock_enable(u32 clock_id)
532 {
533 return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL);
534 }
535 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable);
536
537 /**
538 * zynqmp_pm_clock_disable() - Disable the clock for given id
539 * @clock_id: ID of the clock to be disable
540 *
541 * This function is used by master to disable the clock
542 * including peripherals and PLL clocks.
543 *
544 * Return: Returns status, either success or error+reason
545 */
zynqmp_pm_clock_disable(u32 clock_id)546 int zynqmp_pm_clock_disable(u32 clock_id)
547 {
548 return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL);
549 }
550 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable);
551
552 /**
553 * zynqmp_pm_clock_getstate() - Get the clock state for given id
554 * @clock_id: ID of the clock to be queried
555 * @state: 1/0 (Enabled/Disabled)
556 *
557 * This function is used by master to get the state of clock
558 * including peripherals and PLL clocks.
559 *
560 * Return: Returns status, either success or error+reason
561 */
zynqmp_pm_clock_getstate(u32 clock_id,u32 * state)562 int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state)
563 {
564 u32 ret_payload[PAYLOAD_ARG_CNT];
565 int ret;
566
567 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETSTATE, clock_id, 0,
568 0, 0, ret_payload);
569 *state = ret_payload[1];
570
571 return ret;
572 }
573 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate);
574
575 /**
576 * zynqmp_pm_clock_setdivider() - Set the clock divider for given id
577 * @clock_id: ID of the clock
578 * @divider: divider value
579 *
580 * This function is used by master to set divider for any clock
581 * to achieve desired rate.
582 *
583 * Return: Returns status, either success or error+reason
584 */
zynqmp_pm_clock_setdivider(u32 clock_id,u32 divider)585 int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider)
586 {
587 return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider,
588 0, 0, NULL);
589 }
590 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider);
591
592 /**
593 * zynqmp_pm_clock_getdivider() - Get the clock divider for given id
594 * @clock_id: ID of the clock
595 * @divider: divider value
596 *
597 * This function is used by master to get divider values
598 * for any clock.
599 *
600 * Return: Returns status, either success or error+reason
601 */
zynqmp_pm_clock_getdivider(u32 clock_id,u32 * divider)602 int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider)
603 {
604 u32 ret_payload[PAYLOAD_ARG_CNT];
605 int ret;
606
607 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETDIVIDER, clock_id, 0,
608 0, 0, ret_payload);
609 *divider = ret_payload[1];
610
611 return ret;
612 }
613 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider);
614
615 /**
616 * zynqmp_pm_clock_setrate() - Set the clock rate for given id
617 * @clock_id: ID of the clock
618 * @rate: rate value in hz
619 *
620 * This function is used by master to set rate for any clock.
621 *
622 * Return: Returns status, either success or error+reason
623 */
zynqmp_pm_clock_setrate(u32 clock_id,u64 rate)624 int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate)
625 {
626 return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id,
627 lower_32_bits(rate),
628 upper_32_bits(rate),
629 0, NULL);
630 }
631 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate);
632
633 /**
634 * zynqmp_pm_clock_getrate() - Get the clock rate for given id
635 * @clock_id: ID of the clock
636 * @rate: rate value in hz
637 *
638 * This function is used by master to get rate
639 * for any clock.
640 *
641 * Return: Returns status, either success or error+reason
642 */
zynqmp_pm_clock_getrate(u32 clock_id,u64 * rate)643 int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate)
644 {
645 u32 ret_payload[PAYLOAD_ARG_CNT];
646 int ret;
647
648 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETRATE, clock_id, 0,
649 0, 0, ret_payload);
650 *rate = ((u64)ret_payload[2] << 32) | ret_payload[1];
651
652 return ret;
653 }
654 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate);
655
656 /**
657 * zynqmp_pm_clock_setparent() - Set the clock parent for given id
658 * @clock_id: ID of the clock
659 * @parent_id: parent id
660 *
661 * This function is used by master to set parent for any clock.
662 *
663 * Return: Returns status, either success or error+reason
664 */
zynqmp_pm_clock_setparent(u32 clock_id,u32 parent_id)665 int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id)
666 {
667 return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id,
668 parent_id, 0, 0, NULL);
669 }
670 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent);
671
672 /**
673 * zynqmp_pm_clock_getparent() - Get the clock parent for given id
674 * @clock_id: ID of the clock
675 * @parent_id: parent id
676 *
677 * This function is used by master to get parent index
678 * for any clock.
679 *
680 * Return: Returns status, either success or error+reason
681 */
zynqmp_pm_clock_getparent(u32 clock_id,u32 * parent_id)682 int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id)
683 {
684 u32 ret_payload[PAYLOAD_ARG_CNT];
685 int ret;
686
687 ret = zynqmp_pm_invoke_fn(PM_CLOCK_GETPARENT, clock_id, 0,
688 0, 0, ret_payload);
689 *parent_id = ret_payload[1];
690
691 return ret;
692 }
693 EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent);
694
695 /**
696 * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode
697 *
698 * @clk_id: PLL clock ID
699 * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT)
700 *
701 * This function sets PLL mode
702 *
703 * Return: Returns status, either success or error+reason
704 */
zynqmp_pm_set_pll_frac_mode(u32 clk_id,u32 mode)705 int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode)
706 {
707 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE,
708 clk_id, mode, NULL);
709 }
710 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode);
711
712 /**
713 * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode
714 *
715 * @clk_id: PLL clock ID
716 * @mode: PLL mode
717 *
718 * This function return current PLL mode
719 *
720 * Return: Returns status, either success or error+reason
721 */
zynqmp_pm_get_pll_frac_mode(u32 clk_id,u32 * mode)722 int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode)
723 {
724 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE,
725 clk_id, 0, mode);
726 }
727 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode);
728
729 /**
730 * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data
731 *
732 * @clk_id: PLL clock ID
733 * @data: fraction data
734 *
735 * This function sets fraction data.
736 * It is valid for fraction mode only.
737 *
738 * Return: Returns status, either success or error+reason
739 */
zynqmp_pm_set_pll_frac_data(u32 clk_id,u32 data)740 int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data)
741 {
742 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA,
743 clk_id, data, NULL);
744 }
745 EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data);
746
747 /**
748 * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data
749 *
750 * @clk_id: PLL clock ID
751 * @data: fraction data
752 *
753 * This function returns fraction data value.
754 *
755 * Return: Returns status, either success or error+reason
756 */
zynqmp_pm_get_pll_frac_data(u32 clk_id,u32 * data)757 int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data)
758 {
759 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA,
760 clk_id, 0, data);
761 }
762 EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data);
763
764 /**
765 * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device
766 *
767 * @node_id: Node ID of the device
768 * @type: Type of tap delay to set (input/output)
769 * @value: Value to set fot the tap delay
770 *
771 * This function sets input/output tap delay for the SD device.
772 *
773 * Return: Returns status, either success or error+reason
774 */
zynqmp_pm_set_sd_tapdelay(u32 node_id,u32 type,u32 value)775 int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value)
776 {
777 u32 reg = (type == PM_TAPDELAY_INPUT) ? SD_ITAPDLY : SD_OTAPDLYSEL;
778 u32 mask = (node_id == NODE_SD_0) ? GENMASK(15, 0) : GENMASK(31, 16);
779
780 if (value) {
781 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
782 IOCTL_SET_SD_TAPDELAY,
783 type, value, NULL);
784 }
785
786 /*
787 * Work around completely misdesigned firmware API on Xilinx ZynqMP.
788 * The IOCTL_SET_SD_TAPDELAY firmware call allows the caller to only
789 * ever set IOU_SLCR SD_ITAPDLY Register SD0_ITAPDLYENA/SD1_ITAPDLYENA
790 * bits, but there is no matching call to clear those bits. If those
791 * bits are not cleared, SDMMC tuning may fail.
792 *
793 * Luckily, there are PM_MMIO_READ/PM_MMIO_WRITE calls which seem to
794 * allow complete unrestricted access to all address space, including
795 * IOU_SLCR SD_ITAPDLY Register and all the other registers, access
796 * to which was supposed to be protected by the current firmware API.
797 *
798 * Use PM_MMIO_READ/PM_MMIO_WRITE to re-implement the missing counter
799 * part of IOCTL_SET_SD_TAPDELAY which clears SDx_ITAPDLYENA bits.
800 */
801 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, reg, mask, 0, 0, NULL);
802 }
803 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay);
804
805 /**
806 * zynqmp_pm_sd_dll_reset() - Reset DLL logic
807 *
808 * @node_id: Node ID of the device
809 * @type: Reset type
810 *
811 * This function resets DLL logic for the SD device.
812 *
813 * Return: Returns status, either success or error+reason
814 */
zynqmp_pm_sd_dll_reset(u32 node_id,u32 type)815 int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type)
816 {
817 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SD_DLL_RESET,
818 type, 0, NULL);
819 }
820 EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset);
821
822 /**
823 * zynqmp_pm_ospi_mux_select() - OSPI Mux selection
824 *
825 * @dev_id: Device Id of the OSPI device.
826 * @select: OSPI Mux select value.
827 *
828 * This function select the OSPI Mux.
829 *
830 * Return: Returns status, either success or error+reason
831 */
zynqmp_pm_ospi_mux_select(u32 dev_id,u32 select)832 int zynqmp_pm_ospi_mux_select(u32 dev_id, u32 select)
833 {
834 return zynqmp_pm_invoke_fn(PM_IOCTL, dev_id, IOCTL_OSPI_MUX_SELECT,
835 select, 0, NULL);
836 }
837 EXPORT_SYMBOL_GPL(zynqmp_pm_ospi_mux_select);
838
839 /**
840 * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs)
841 * @index: GGS register index
842 * @value: Register value to be written
843 *
844 * This function writes value to GGS register.
845 *
846 * Return: Returns status, either success or error+reason
847 */
zynqmp_pm_write_ggs(u32 index,u32 value)848 int zynqmp_pm_write_ggs(u32 index, u32 value)
849 {
850 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS,
851 index, value, NULL);
852 }
853 EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs);
854
855 /**
856 * zynqmp_pm_read_ggs() - PM API for reading global general storage (ggs)
857 * @index: GGS register index
858 * @value: Register value to be written
859 *
860 * This function returns GGS register value.
861 *
862 * Return: Returns status, either success or error+reason
863 */
zynqmp_pm_read_ggs(u32 index,u32 * value)864 int zynqmp_pm_read_ggs(u32 index, u32 *value)
865 {
866 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS,
867 index, 0, value);
868 }
869 EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs);
870
871 /**
872 * zynqmp_pm_write_pggs() - PM API for writing persistent global general
873 * storage (pggs)
874 * @index: PGGS register index
875 * @value: Register value to be written
876 *
877 * This function writes value to PGGS register.
878 *
879 * Return: Returns status, either success or error+reason
880 */
zynqmp_pm_write_pggs(u32 index,u32 value)881 int zynqmp_pm_write_pggs(u32 index, u32 value)
882 {
883 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value,
884 NULL);
885 }
886 EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs);
887
888 /**
889 * zynqmp_pm_read_pggs() - PM API for reading persistent global general
890 * storage (pggs)
891 * @index: PGGS register index
892 * @value: Register value to be written
893 *
894 * This function returns PGGS register value.
895 *
896 * Return: Returns status, either success or error+reason
897 */
zynqmp_pm_read_pggs(u32 index,u32 * value)898 int zynqmp_pm_read_pggs(u32 index, u32 *value)
899 {
900 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0,
901 value);
902 }
903 EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs);
904
zynqmp_pm_set_tapdelay_bypass(u32 index,u32 value)905 int zynqmp_pm_set_tapdelay_bypass(u32 index, u32 value)
906 {
907 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_TAPDELAY_BYPASS,
908 index, value, NULL);
909 }
910 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tapdelay_bypass);
911
912 /**
913 * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status
914 * @value: Status value to be written
915 *
916 * This function sets healthy bit value to indicate boot health status
917 * to firmware.
918 *
919 * Return: Returns status, either success or error+reason
920 */
zynqmp_pm_set_boot_health_status(u32 value)921 int zynqmp_pm_set_boot_health_status(u32 value)
922 {
923 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS,
924 value, 0, NULL);
925 }
926
927 /**
928 * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release)
929 * @reset: Reset to be configured
930 * @assert_flag: Flag stating should reset be asserted (1) or
931 * released (0)
932 *
933 * Return: Returns status, either success or error+reason
934 */
zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,const enum zynqmp_pm_reset_action assert_flag)935 int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset,
936 const enum zynqmp_pm_reset_action assert_flag)
937 {
938 return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag,
939 0, 0, NULL);
940 }
941 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert);
942
943 /**
944 * zynqmp_pm_reset_get_status - Get status of the reset
945 * @reset: Reset whose status should be returned
946 * @status: Returned status
947 *
948 * Return: Returns status, either success or error+reason
949 */
zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset,u32 * status)950 int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status)
951 {
952 u32 ret_payload[PAYLOAD_ARG_CNT];
953 int ret;
954
955 if (!status)
956 return -EINVAL;
957
958 ret = zynqmp_pm_invoke_fn(PM_RESET_GET_STATUS, reset, 0,
959 0, 0, ret_payload);
960 *status = ret_payload[1];
961
962 return ret;
963 }
964 EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status);
965
966 /**
967 * zynqmp_pm_fpga_load - Perform the fpga load
968 * @address: Address to write to
969 * @size: pl bitstream size
970 * @flags: Bitstream type
971 * -XILINX_ZYNQMP_PM_FPGA_FULL: FPGA full reconfiguration
972 * -XILINX_ZYNQMP_PM_FPGA_PARTIAL: FPGA partial reconfiguration
973 *
974 * This function provides access to pmufw. To transfer
975 * the required bitstream into PL.
976 *
977 * Return: Returns status, either success or error+reason
978 */
zynqmp_pm_fpga_load(const u64 address,const u32 size,const u32 flags)979 int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags)
980 {
981 u32 ret_payload[PAYLOAD_ARG_CNT];
982 int ret;
983
984 ret = zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address),
985 upper_32_bits(address), size, flags,
986 ret_payload);
987 if (ret_payload[0])
988 return -ret_payload[0];
989
990 return ret;
991 }
992 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load);
993
994 /**
995 * zynqmp_pm_fpga_get_status - Read value from PCAP status register
996 * @value: Value to read
997 *
998 * This function provides access to the pmufw to get the PCAP
999 * status
1000 *
1001 * Return: Returns status, either success or error+reason
1002 */
zynqmp_pm_fpga_get_status(u32 * value)1003 int zynqmp_pm_fpga_get_status(u32 *value)
1004 {
1005 u32 ret_payload[PAYLOAD_ARG_CNT];
1006 int ret;
1007
1008 if (!value)
1009 return -EINVAL;
1010
1011 ret = zynqmp_pm_invoke_fn(PM_FPGA_GET_STATUS, 0, 0, 0, 0, ret_payload);
1012 *value = ret_payload[1];
1013
1014 return ret;
1015 }
1016 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status);
1017
1018 /**
1019 * zynqmp_pm_fpga_get_config_status - Get the FPGA configuration status.
1020 * @value: Buffer to store FPGA configuration status.
1021 *
1022 * This function provides access to the pmufw to get the FPGA configuration
1023 * status
1024 *
1025 * Return: 0 on success, a negative value on error
1026 */
zynqmp_pm_fpga_get_config_status(u32 * value)1027 int zynqmp_pm_fpga_get_config_status(u32 *value)
1028 {
1029 u32 ret_payload[PAYLOAD_ARG_CNT];
1030 u32 buf, lower_addr, upper_addr;
1031 int ret;
1032
1033 if (!value)
1034 return -EINVAL;
1035
1036 lower_addr = lower_32_bits((u64)&buf);
1037 upper_addr = upper_32_bits((u64)&buf);
1038
1039 ret = zynqmp_pm_invoke_fn(PM_FPGA_READ,
1040 XILINX_ZYNQMP_PM_FPGA_CONFIG_STAT_OFFSET,
1041 lower_addr, upper_addr,
1042 XILINX_ZYNQMP_PM_FPGA_READ_CONFIG_REG,
1043 ret_payload);
1044
1045 *value = ret_payload[1];
1046
1047 return ret;
1048 }
1049 EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_config_status);
1050
1051 /**
1052 * zynqmp_pm_pinctrl_request - Request Pin from firmware
1053 * @pin: Pin number to request
1054 *
1055 * This function requests pin from firmware.
1056 *
1057 * Return: Returns status, either success or error+reason.
1058 */
zynqmp_pm_pinctrl_request(const u32 pin)1059 int zynqmp_pm_pinctrl_request(const u32 pin)
1060 {
1061 return zynqmp_pm_invoke_fn(PM_PINCTRL_REQUEST, pin, 0, 0, 0, NULL);
1062 }
1063 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_request);
1064
1065 /**
1066 * zynqmp_pm_pinctrl_release - Inform firmware that Pin control is released
1067 * @pin: Pin number to release
1068 *
1069 * This function release pin from firmware.
1070 *
1071 * Return: Returns status, either success or error+reason.
1072 */
zynqmp_pm_pinctrl_release(const u32 pin)1073 int zynqmp_pm_pinctrl_release(const u32 pin)
1074 {
1075 return zynqmp_pm_invoke_fn(PM_PINCTRL_RELEASE, pin, 0, 0, 0, NULL);
1076 }
1077 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_release);
1078
1079 /**
1080 * zynqmp_pm_pinctrl_get_function - Read function id set for the given pin
1081 * @pin: Pin number
1082 * @id: Buffer to store function ID
1083 *
1084 * This function provides the function currently set for the given pin.
1085 *
1086 * Return: Returns status, either success or error+reason
1087 */
zynqmp_pm_pinctrl_get_function(const u32 pin,u32 * id)1088 int zynqmp_pm_pinctrl_get_function(const u32 pin, u32 *id)
1089 {
1090 u32 ret_payload[PAYLOAD_ARG_CNT];
1091 int ret;
1092
1093 if (!id)
1094 return -EINVAL;
1095
1096 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_GET_FUNCTION, pin, 0,
1097 0, 0, ret_payload);
1098 *id = ret_payload[1];
1099
1100 return ret;
1101 }
1102 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_function);
1103
1104 /**
1105 * zynqmp_pm_pinctrl_set_function - Set requested function for the pin
1106 * @pin: Pin number
1107 * @id: Function ID to set
1108 *
1109 * This function sets requested function for the given pin.
1110 *
1111 * Return: Returns status, either success or error+reason.
1112 */
zynqmp_pm_pinctrl_set_function(const u32 pin,const u32 id)1113 int zynqmp_pm_pinctrl_set_function(const u32 pin, const u32 id)
1114 {
1115 return zynqmp_pm_invoke_fn(PM_PINCTRL_SET_FUNCTION, pin, id,
1116 0, 0, NULL);
1117 }
1118 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_function);
1119
1120 /**
1121 * zynqmp_pm_pinctrl_get_config - Get configuration parameter for the pin
1122 * @pin: Pin number
1123 * @param: Parameter to get
1124 * @value: Buffer to store parameter value
1125 *
1126 * This function gets requested configuration parameter for the given pin.
1127 *
1128 * Return: Returns status, either success or error+reason.
1129 */
zynqmp_pm_pinctrl_get_config(const u32 pin,const u32 param,u32 * value)1130 int zynqmp_pm_pinctrl_get_config(const u32 pin, const u32 param,
1131 u32 *value)
1132 {
1133 u32 ret_payload[PAYLOAD_ARG_CNT];
1134 int ret;
1135
1136 if (!value)
1137 return -EINVAL;
1138
1139 ret = zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_GET, pin, param,
1140 0, 0, ret_payload);
1141 *value = ret_payload[1];
1142
1143 return ret;
1144 }
1145 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_get_config);
1146
1147 /**
1148 * zynqmp_pm_pinctrl_set_config - Set configuration parameter for the pin
1149 * @pin: Pin number
1150 * @param: Parameter to set
1151 * @value: Parameter value to set
1152 *
1153 * This function sets requested configuration parameter for the given pin.
1154 *
1155 * Return: Returns status, either success or error+reason.
1156 */
zynqmp_pm_pinctrl_set_config(const u32 pin,const u32 param,u32 value)1157 int zynqmp_pm_pinctrl_set_config(const u32 pin, const u32 param,
1158 u32 value)
1159 {
1160 int ret;
1161
1162 if (pm_family_code == ZYNQMP_FAMILY_CODE &&
1163 param == PM_PINCTRL_CONFIG_TRI_STATE) {
1164 ret = zynqmp_pm_feature(PM_PINCTRL_CONFIG_PARAM_SET);
1165 if (ret < PM_PINCTRL_PARAM_SET_VERSION)
1166 return -EOPNOTSUPP;
1167 }
1168
1169 return zynqmp_pm_invoke_fn(PM_PINCTRL_CONFIG_PARAM_SET, pin,
1170 param, value, 0, NULL);
1171 }
1172 EXPORT_SYMBOL_GPL(zynqmp_pm_pinctrl_set_config);
1173
1174 /**
1175 * zynqmp_pm_bootmode_read() - PM Config API for read bootpin status
1176 * @ps_mode: Returned output value of ps_mode
1177 *
1178 * This API function is to be used for notify the power management controller
1179 * to read bootpin status.
1180 *
1181 * Return: status, either success or error+reason
1182 */
zynqmp_pm_bootmode_read(u32 * ps_mode)1183 unsigned int zynqmp_pm_bootmode_read(u32 *ps_mode)
1184 {
1185 unsigned int ret;
1186 u32 ret_payload[PAYLOAD_ARG_CNT];
1187
1188 ret = zynqmp_pm_invoke_fn(PM_MMIO_READ, CRL_APB_BOOT_PIN_CTRL, 0,
1189 0, 0, ret_payload);
1190
1191 *ps_mode = ret_payload[1];
1192
1193 return ret;
1194 }
1195 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_read);
1196
1197 /**
1198 * zynqmp_pm_bootmode_write() - PM Config API for Configure bootpin
1199 * @ps_mode: Value to be written to the bootpin ctrl register
1200 *
1201 * This API function is to be used for notify the power management controller
1202 * to configure bootpin.
1203 *
1204 * Return: Returns status, either success or error+reason
1205 */
zynqmp_pm_bootmode_write(u32 ps_mode)1206 int zynqmp_pm_bootmode_write(u32 ps_mode)
1207 {
1208 return zynqmp_pm_invoke_fn(PM_MMIO_WRITE, CRL_APB_BOOT_PIN_CTRL,
1209 CRL_APB_BOOTPIN_CTRL_MASK, ps_mode, 0, NULL);
1210 }
1211 EXPORT_SYMBOL_GPL(zynqmp_pm_bootmode_write);
1212
1213 /**
1214 * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller
1215 * master has initialized its own power management
1216 *
1217 * Return: Returns status, either success or error+reason
1218 *
1219 * This API function is to be used for notify the power management controller
1220 * about the completed power management initialization.
1221 */
zynqmp_pm_init_finalize(void)1222 int zynqmp_pm_init_finalize(void)
1223 {
1224 return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL);
1225 }
1226 EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize);
1227
1228 /**
1229 * zynqmp_pm_set_suspend_mode() - Set system suspend mode
1230 * @mode: Mode to set for system suspend
1231 *
1232 * This API function is used to set mode of system suspend.
1233 *
1234 * Return: Returns status, either success or error+reason
1235 */
zynqmp_pm_set_suspend_mode(u32 mode)1236 int zynqmp_pm_set_suspend_mode(u32 mode)
1237 {
1238 return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL);
1239 }
1240 EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode);
1241
1242 /**
1243 * zynqmp_pm_request_node() - Request a node with specific capabilities
1244 * @node: Node ID of the slave
1245 * @capabilities: Requested capabilities of the slave
1246 * @qos: Quality of service (not supported)
1247 * @ack: Flag to specify whether acknowledge is requested
1248 *
1249 * This function is used by master to request particular node from firmware.
1250 * Every master must request node before using it.
1251 *
1252 * Return: Returns status, either success or error+reason
1253 */
zynqmp_pm_request_node(const u32 node,const u32 capabilities,const u32 qos,const enum zynqmp_pm_request_ack ack)1254 int zynqmp_pm_request_node(const u32 node, const u32 capabilities,
1255 const u32 qos, const enum zynqmp_pm_request_ack ack)
1256 {
1257 return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities,
1258 qos, ack, NULL);
1259 }
1260 EXPORT_SYMBOL_GPL(zynqmp_pm_request_node);
1261
1262 /**
1263 * zynqmp_pm_release_node() - Release a node
1264 * @node: Node ID of the slave
1265 *
1266 * This function is used by master to inform firmware that master
1267 * has released node. Once released, master must not use that node
1268 * without re-request.
1269 *
1270 * Return: Returns status, either success or error+reason
1271 */
zynqmp_pm_release_node(const u32 node)1272 int zynqmp_pm_release_node(const u32 node)
1273 {
1274 return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL);
1275 }
1276 EXPORT_SYMBOL_GPL(zynqmp_pm_release_node);
1277
1278 /**
1279 * zynqmp_pm_get_rpu_mode() - Get RPU mode
1280 * @node_id: Node ID of the device
1281 * @rpu_mode: return by reference value
1282 * either split or lockstep
1283 *
1284 * Return: return 0 on success or error+reason.
1285 * if success, then rpu_mode will be set
1286 * to current rpu mode.
1287 */
zynqmp_pm_get_rpu_mode(u32 node_id,enum rpu_oper_mode * rpu_mode)1288 int zynqmp_pm_get_rpu_mode(u32 node_id, enum rpu_oper_mode *rpu_mode)
1289 {
1290 u32 ret_payload[PAYLOAD_ARG_CNT];
1291 int ret;
1292
1293 ret = zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
1294 IOCTL_GET_RPU_OPER_MODE, 0, 0, ret_payload);
1295
1296 /* only set rpu_mode if no error */
1297 if (ret == XST_PM_SUCCESS)
1298 *rpu_mode = ret_payload[0];
1299
1300 return ret;
1301 }
1302 EXPORT_SYMBOL_GPL(zynqmp_pm_get_rpu_mode);
1303
1304 /**
1305 * zynqmp_pm_set_rpu_mode() - Set RPU mode
1306 * @node_id: Node ID of the device
1307 * @rpu_mode: Argument 1 to requested IOCTL call. either split or lockstep
1308 *
1309 * This function is used to set RPU mode to split or
1310 * lockstep
1311 *
1312 * Return: Returns status, either success or error+reason
1313 */
zynqmp_pm_set_rpu_mode(u32 node_id,enum rpu_oper_mode rpu_mode)1314 int zynqmp_pm_set_rpu_mode(u32 node_id, enum rpu_oper_mode rpu_mode)
1315 {
1316 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
1317 IOCTL_SET_RPU_OPER_MODE, (u32)rpu_mode,
1318 0, NULL);
1319 }
1320 EXPORT_SYMBOL_GPL(zynqmp_pm_set_rpu_mode);
1321
1322 /**
1323 * zynqmp_pm_set_tcm_config - configure TCM
1324 * @node_id: Firmware specific TCM subsystem ID
1325 * @tcm_mode: Argument 1 to requested IOCTL call
1326 * either PM_RPU_TCM_COMB or PM_RPU_TCM_SPLIT
1327 *
1328 * This function is used to set RPU mode to split or combined
1329 *
1330 * Return: status: 0 for success, else failure
1331 */
zynqmp_pm_set_tcm_config(u32 node_id,enum rpu_tcm_comb tcm_mode)1332 int zynqmp_pm_set_tcm_config(u32 node_id, enum rpu_tcm_comb tcm_mode)
1333 {
1334 return zynqmp_pm_invoke_fn(PM_IOCTL, node_id,
1335 IOCTL_TCM_COMB_CONFIG, (u32)tcm_mode, 0,
1336 NULL);
1337 }
1338 EXPORT_SYMBOL_GPL(zynqmp_pm_set_tcm_config);
1339
1340 /**
1341 * zynqmp_pm_force_pwrdwn - PM call to request for another PU or subsystem to
1342 * be powered down forcefully
1343 * @node: Node ID of the targeted PU or subsystem
1344 * @ack: Flag to specify whether acknowledge is requested
1345 *
1346 * Return: status, either success or error+reason
1347 */
zynqmp_pm_force_pwrdwn(const u32 node,const enum zynqmp_pm_request_ack ack)1348 int zynqmp_pm_force_pwrdwn(const u32 node,
1349 const enum zynqmp_pm_request_ack ack)
1350 {
1351 return zynqmp_pm_invoke_fn(PM_FORCE_POWERDOWN, node, ack, 0, 0, NULL);
1352 }
1353 EXPORT_SYMBOL_GPL(zynqmp_pm_force_pwrdwn);
1354
1355 /**
1356 * zynqmp_pm_request_wake - PM call to wake up selected master or subsystem
1357 * @node: Node ID of the master or subsystem
1358 * @set_addr: Specifies whether the address argument is relevant
1359 * @address: Address from which to resume when woken up
1360 * @ack: Flag to specify whether acknowledge requested
1361 *
1362 * Return: status, either success or error+reason
1363 */
zynqmp_pm_request_wake(const u32 node,const bool set_addr,const u64 address,const enum zynqmp_pm_request_ack ack)1364 int zynqmp_pm_request_wake(const u32 node,
1365 const bool set_addr,
1366 const u64 address,
1367 const enum zynqmp_pm_request_ack ack)
1368 {
1369 /* set_addr flag is encoded into 1st bit of address */
1370 return zynqmp_pm_invoke_fn(PM_REQUEST_WAKEUP, node, address | set_addr,
1371 address >> 32, ack, NULL);
1372 }
1373 EXPORT_SYMBOL_GPL(zynqmp_pm_request_wake);
1374
1375 /**
1376 * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves
1377 * @node: Node ID of the slave
1378 * @capabilities: Requested capabilities of the slave
1379 * @qos: Quality of service (not supported)
1380 * @ack: Flag to specify whether acknowledge is requested
1381 *
1382 * This API function is to be used for slaves a PU already has requested
1383 * to change its capabilities.
1384 *
1385 * Return: Returns status, either success or error+reason
1386 */
zynqmp_pm_set_requirement(const u32 node,const u32 capabilities,const u32 qos,const enum zynqmp_pm_request_ack ack)1387 int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
1388 const u32 qos,
1389 const enum zynqmp_pm_request_ack ack)
1390 {
1391 return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities,
1392 qos, ack, NULL);
1393 }
1394 EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement);
1395
1396 /**
1397 * zynqmp_pm_load_pdi - Load and process PDI
1398 * @src: Source device where PDI is located
1399 * @address: PDI src address
1400 *
1401 * This function provides support to load PDI from linux
1402 *
1403 * Return: Returns status, either success or error+reason
1404 */
zynqmp_pm_load_pdi(const u32 src,const u64 address)1405 int zynqmp_pm_load_pdi(const u32 src, const u64 address)
1406 {
1407 return zynqmp_pm_invoke_fn(PM_LOAD_PDI, src,
1408 lower_32_bits(address),
1409 upper_32_bits(address), 0, NULL);
1410 }
1411 EXPORT_SYMBOL_GPL(zynqmp_pm_load_pdi);
1412
1413 /**
1414 * zynqmp_pm_aes_engine - Access AES hardware to encrypt/decrypt the data using
1415 * AES-GCM core.
1416 * @address: Address of the AesParams structure.
1417 * @out: Returned output value
1418 *
1419 * Return: Returns status, either success or error code.
1420 */
zynqmp_pm_aes_engine(const u64 address,u32 * out)1421 int zynqmp_pm_aes_engine(const u64 address, u32 *out)
1422 {
1423 u32 ret_payload[PAYLOAD_ARG_CNT];
1424 int ret;
1425
1426 if (!out)
1427 return -EINVAL;
1428
1429 ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
1430 lower_32_bits(address),
1431 0, 0, ret_payload);
1432 *out = ret_payload[1];
1433
1434 return ret;
1435 }
1436 EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine);
1437
1438 /**
1439 * zynqmp_pm_sha_hash - Access the SHA engine to calculate the hash
1440 * @address: Address of the data/ Address of output buffer where
1441 * hash should be stored.
1442 * @size: Size of the data.
1443 * @flags:
1444 * BIT(0) - for initializing csudma driver and SHA3(Here address
1445 * and size inputs can be NULL).
1446 * BIT(1) - to call Sha3_Update API which can be called multiple
1447 * times when data is not contiguous.
1448 * BIT(2) - to get final hash of the whole updated data.
1449 * Hash will be overwritten at provided address with
1450 * 48 bytes.
1451 *
1452 * Return: Returns status, either success or error code.
1453 */
zynqmp_pm_sha_hash(const u64 address,const u32 size,const u32 flags)1454 int zynqmp_pm_sha_hash(const u64 address, const u32 size, const u32 flags)
1455 {
1456 u32 lower_addr = lower_32_bits(address);
1457 u32 upper_addr = upper_32_bits(address);
1458
1459 return zynqmp_pm_invoke_fn(PM_SECURE_SHA, upper_addr, lower_addr,
1460 size, flags, NULL);
1461 }
1462 EXPORT_SYMBOL_GPL(zynqmp_pm_sha_hash);
1463
1464 /**
1465 * zynqmp_pm_register_notifier() - PM API for register a subsystem
1466 * to be notified about specific
1467 * event/error.
1468 * @node: Node ID to which the event is related.
1469 * @event: Event Mask of Error events for which wants to get notified.
1470 * @wake: Wake subsystem upon capturing the event if value 1
1471 * @enable: Enable the registration for value 1, disable for value 0
1472 *
1473 * This function is used to register/un-register for particular node-event
1474 * combination in firmware.
1475 *
1476 * Return: Returns status, either success or error+reason
1477 */
1478
zynqmp_pm_register_notifier(const u32 node,const u32 event,const u32 wake,const u32 enable)1479 int zynqmp_pm_register_notifier(const u32 node, const u32 event,
1480 const u32 wake, const u32 enable)
1481 {
1482 return zynqmp_pm_invoke_fn(PM_REGISTER_NOTIFIER, node, event,
1483 wake, enable, NULL);
1484 }
1485 EXPORT_SYMBOL_GPL(zynqmp_pm_register_notifier);
1486
1487 /**
1488 * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart
1489 * @type: Shutdown or restart? 0 for shutdown, 1 for restart
1490 * @subtype: Specifies which system should be restarted or shut down
1491 *
1492 * Return: Returns status, either success or error+reason
1493 */
zynqmp_pm_system_shutdown(const u32 type,const u32 subtype)1494 int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype)
1495 {
1496 return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype,
1497 0, 0, NULL);
1498 }
1499
1500 /**
1501 * zynqmp_pm_set_feature_config - PM call to request IOCTL for feature config
1502 * @id: The config ID of the feature to be configured
1503 * @value: The config value of the feature to be configured
1504 *
1505 * Return: Returns 0 on success or error value on failure.
1506 */
zynqmp_pm_set_feature_config(enum pm_feature_config_id id,u32 value)1507 int zynqmp_pm_set_feature_config(enum pm_feature_config_id id, u32 value)
1508 {
1509 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_FEATURE_CONFIG,
1510 id, value, NULL);
1511 }
1512
1513 /**
1514 * zynqmp_pm_get_feature_config - PM call to get value of configured feature
1515 * @id: The config id of the feature to be queried
1516 * @payload: Returned value array
1517 *
1518 * Return: Returns 0 on success or error value on failure.
1519 */
zynqmp_pm_get_feature_config(enum pm_feature_config_id id,u32 * payload)1520 int zynqmp_pm_get_feature_config(enum pm_feature_config_id id,
1521 u32 *payload)
1522 {
1523 return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_FEATURE_CONFIG,
1524 id, 0, payload);
1525 }
1526
1527 /**
1528 * zynqmp_pm_set_sd_config - PM call to set value of SD config registers
1529 * @node: SD node ID
1530 * @config: The config type of SD registers
1531 * @value: Value to be set
1532 *
1533 * Return: Returns 0 on success or error value on failure.
1534 */
zynqmp_pm_set_sd_config(u32 node,enum pm_sd_config_type config,u32 value)1535 int zynqmp_pm_set_sd_config(u32 node, enum pm_sd_config_type config, u32 value)
1536 {
1537 return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_SD_CONFIG,
1538 config, value, NULL);
1539 }
1540 EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_config);
1541
1542 /**
1543 * zynqmp_pm_set_gem_config - PM call to set value of GEM config registers
1544 * @node: GEM node ID
1545 * @config: The config type of GEM registers
1546 * @value: Value to be set
1547 *
1548 * Return: Returns 0 on success or error value on failure.
1549 */
zynqmp_pm_set_gem_config(u32 node,enum pm_gem_config_type config,u32 value)1550 int zynqmp_pm_set_gem_config(u32 node, enum pm_gem_config_type config,
1551 u32 value)
1552 {
1553 return zynqmp_pm_invoke_fn(PM_IOCTL, node, IOCTL_SET_GEM_CONFIG,
1554 config, value, NULL);
1555 }
1556 EXPORT_SYMBOL_GPL(zynqmp_pm_set_gem_config);
1557
1558 /**
1559 * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope
1560 * @subtype: Shutdown subtype
1561 * @name: Matching string for scope argument
1562 *
1563 * This struct encapsulates mapping between shutdown scope ID and string.
1564 */
1565 struct zynqmp_pm_shutdown_scope {
1566 const enum zynqmp_pm_shutdown_subtype subtype;
1567 const char *name;
1568 };
1569
1570 static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = {
1571 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = {
1572 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM,
1573 .name = "subsystem",
1574 },
1575 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = {
1576 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY,
1577 .name = "ps_only",
1578 },
1579 [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = {
1580 .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM,
1581 .name = "system",
1582 },
1583 };
1584
1585 static struct zynqmp_pm_shutdown_scope *selected_scope =
1586 &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM];
1587
1588 /**
1589 * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid
1590 * @scope_string: Shutdown scope string
1591 *
1592 * Return: Return pointer to matching shutdown scope struct from
1593 * array of available options in system if string is valid,
1594 * otherwise returns NULL.
1595 */
1596 static struct zynqmp_pm_shutdown_scope*
zynqmp_pm_is_shutdown_scope_valid(const char * scope_string)1597 zynqmp_pm_is_shutdown_scope_valid(const char *scope_string)
1598 {
1599 int count;
1600
1601 for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++)
1602 if (sysfs_streq(scope_string, shutdown_scopes[count].name))
1603 return &shutdown_scopes[count];
1604
1605 return NULL;
1606 }
1607
shutdown_scope_show(struct device * device,struct device_attribute * attr,char * buf)1608 static ssize_t shutdown_scope_show(struct device *device,
1609 struct device_attribute *attr,
1610 char *buf)
1611 {
1612 int i;
1613
1614 for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) {
1615 if (&shutdown_scopes[i] == selected_scope) {
1616 strcat(buf, "[");
1617 strcat(buf, shutdown_scopes[i].name);
1618 strcat(buf, "]");
1619 } else {
1620 strcat(buf, shutdown_scopes[i].name);
1621 }
1622 strcat(buf, " ");
1623 }
1624 strcat(buf, "\n");
1625
1626 return strlen(buf);
1627 }
1628
shutdown_scope_store(struct device * device,struct device_attribute * attr,const char * buf,size_t count)1629 static ssize_t shutdown_scope_store(struct device *device,
1630 struct device_attribute *attr,
1631 const char *buf, size_t count)
1632 {
1633 int ret;
1634 struct zynqmp_pm_shutdown_scope *scope;
1635
1636 scope = zynqmp_pm_is_shutdown_scope_valid(buf);
1637 if (!scope)
1638 return -EINVAL;
1639
1640 ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY,
1641 scope->subtype);
1642 if (ret) {
1643 pr_err("unable to set shutdown scope %s\n", buf);
1644 return ret;
1645 }
1646
1647 selected_scope = scope;
1648
1649 return count;
1650 }
1651
1652 static DEVICE_ATTR_RW(shutdown_scope);
1653
health_status_store(struct device * device,struct device_attribute * attr,const char * buf,size_t count)1654 static ssize_t health_status_store(struct device *device,
1655 struct device_attribute *attr,
1656 const char *buf, size_t count)
1657 {
1658 int ret;
1659 unsigned int value;
1660
1661 ret = kstrtouint(buf, 10, &value);
1662 if (ret)
1663 return ret;
1664
1665 ret = zynqmp_pm_set_boot_health_status(value);
1666 if (ret) {
1667 dev_err(device, "unable to set healthy bit value to %u\n",
1668 value);
1669 return ret;
1670 }
1671
1672 return count;
1673 }
1674
1675 static DEVICE_ATTR_WO(health_status);
1676
ggs_show(struct device * device,struct device_attribute * attr,char * buf,u32 reg)1677 static ssize_t ggs_show(struct device *device,
1678 struct device_attribute *attr,
1679 char *buf,
1680 u32 reg)
1681 {
1682 int ret;
1683 u32 ret_payload[PAYLOAD_ARG_CNT];
1684
1685 ret = zynqmp_pm_read_ggs(reg, ret_payload);
1686 if (ret)
1687 return ret;
1688
1689 return sprintf(buf, "0x%x\n", ret_payload[1]);
1690 }
1691
ggs_store(struct device * device,struct device_attribute * attr,const char * buf,size_t count,u32 reg)1692 static ssize_t ggs_store(struct device *device,
1693 struct device_attribute *attr,
1694 const char *buf, size_t count,
1695 u32 reg)
1696 {
1697 long value;
1698 int ret;
1699
1700 if (reg >= GSS_NUM_REGS)
1701 return -EINVAL;
1702
1703 ret = kstrtol(buf, 16, &value);
1704 if (ret) {
1705 count = -EFAULT;
1706 goto err;
1707 }
1708
1709 ret = zynqmp_pm_write_ggs(reg, value);
1710 if (ret)
1711 count = -EFAULT;
1712 err:
1713 return count;
1714 }
1715
1716 /* GGS register show functions */
1717 #define GGS0_SHOW(N) \
1718 ssize_t ggs##N##_show(struct device *device, \
1719 struct device_attribute *attr, \
1720 char *buf) \
1721 { \
1722 return ggs_show(device, attr, buf, N); \
1723 }
1724
1725 static GGS0_SHOW(0);
1726 static GGS0_SHOW(1);
1727 static GGS0_SHOW(2);
1728 static GGS0_SHOW(3);
1729
1730 /* GGS register store function */
1731 #define GGS0_STORE(N) \
1732 ssize_t ggs##N##_store(struct device *device, \
1733 struct device_attribute *attr, \
1734 const char *buf, \
1735 size_t count) \
1736 { \
1737 return ggs_store(device, attr, buf, count, N); \
1738 }
1739
1740 static GGS0_STORE(0);
1741 static GGS0_STORE(1);
1742 static GGS0_STORE(2);
1743 static GGS0_STORE(3);
1744
pggs_show(struct device * device,struct device_attribute * attr,char * buf,u32 reg)1745 static ssize_t pggs_show(struct device *device,
1746 struct device_attribute *attr,
1747 char *buf,
1748 u32 reg)
1749 {
1750 int ret;
1751 u32 ret_payload[PAYLOAD_ARG_CNT];
1752
1753 ret = zynqmp_pm_read_pggs(reg, ret_payload);
1754 if (ret)
1755 return ret;
1756
1757 return sprintf(buf, "0x%x\n", ret_payload[1]);
1758 }
1759
pggs_store(struct device * device,struct device_attribute * attr,const char * buf,size_t count,u32 reg)1760 static ssize_t pggs_store(struct device *device,
1761 struct device_attribute *attr,
1762 const char *buf, size_t count,
1763 u32 reg)
1764 {
1765 long value;
1766 int ret;
1767
1768 if (reg >= GSS_NUM_REGS)
1769 return -EINVAL;
1770
1771 ret = kstrtol(buf, 16, &value);
1772 if (ret) {
1773 count = -EFAULT;
1774 goto err;
1775 }
1776
1777 ret = zynqmp_pm_write_pggs(reg, value);
1778 if (ret)
1779 count = -EFAULT;
1780
1781 err:
1782 return count;
1783 }
1784
1785 #define PGGS0_SHOW(N) \
1786 ssize_t pggs##N##_show(struct device *device, \
1787 struct device_attribute *attr, \
1788 char *buf) \
1789 { \
1790 return pggs_show(device, attr, buf, N); \
1791 }
1792
1793 #define PGGS0_STORE(N) \
1794 ssize_t pggs##N##_store(struct device *device, \
1795 struct device_attribute *attr, \
1796 const char *buf, \
1797 size_t count) \
1798 { \
1799 return pggs_store(device, attr, buf, count, N); \
1800 }
1801
1802 /* PGGS register show functions */
1803 static PGGS0_SHOW(0);
1804 static PGGS0_SHOW(1);
1805 static PGGS0_SHOW(2);
1806 static PGGS0_SHOW(3);
1807
1808 /* PGGS register store functions */
1809 static PGGS0_STORE(0);
1810 static PGGS0_STORE(1);
1811 static PGGS0_STORE(2);
1812 static PGGS0_STORE(3);
1813
1814 /* GGS register attributes */
1815 static DEVICE_ATTR_RW(ggs0);
1816 static DEVICE_ATTR_RW(ggs1);
1817 static DEVICE_ATTR_RW(ggs2);
1818 static DEVICE_ATTR_RW(ggs3);
1819
1820 /* PGGS register attributes */
1821 static DEVICE_ATTR_RW(pggs0);
1822 static DEVICE_ATTR_RW(pggs1);
1823 static DEVICE_ATTR_RW(pggs2);
1824 static DEVICE_ATTR_RW(pggs3);
1825
feature_config_id_show(struct device * device,struct device_attribute * attr,char * buf)1826 static ssize_t feature_config_id_show(struct device *device,
1827 struct device_attribute *attr,
1828 char *buf)
1829 {
1830 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1831
1832 return sysfs_emit(buf, "%d\n", devinfo->feature_conf_id);
1833 }
1834
feature_config_id_store(struct device * device,struct device_attribute * attr,const char * buf,size_t count)1835 static ssize_t feature_config_id_store(struct device *device,
1836 struct device_attribute *attr,
1837 const char *buf, size_t count)
1838 {
1839 u32 config_id;
1840 int ret;
1841 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1842
1843 if (!buf)
1844 return -EINVAL;
1845
1846 ret = kstrtou32(buf, 10, &config_id);
1847 if (ret)
1848 return ret;
1849
1850 devinfo->feature_conf_id = config_id;
1851
1852 return count;
1853 }
1854
1855 static DEVICE_ATTR_RW(feature_config_id);
1856
feature_config_value_show(struct device * device,struct device_attribute * attr,char * buf)1857 static ssize_t feature_config_value_show(struct device *device,
1858 struct device_attribute *attr,
1859 char *buf)
1860 {
1861 int ret;
1862 u32 ret_payload[PAYLOAD_ARG_CNT];
1863 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1864
1865 ret = zynqmp_pm_get_feature_config(devinfo->feature_conf_id,
1866 ret_payload);
1867 if (ret)
1868 return ret;
1869
1870 return sysfs_emit(buf, "%d\n", ret_payload[1]);
1871 }
1872
feature_config_value_store(struct device * device,struct device_attribute * attr,const char * buf,size_t count)1873 static ssize_t feature_config_value_store(struct device *device,
1874 struct device_attribute *attr,
1875 const char *buf, size_t count)
1876 {
1877 u32 value;
1878 int ret;
1879 struct zynqmp_devinfo *devinfo = dev_get_drvdata(device);
1880
1881 if (!buf)
1882 return -EINVAL;
1883
1884 ret = kstrtou32(buf, 10, &value);
1885 if (ret)
1886 return ret;
1887
1888 ret = zynqmp_pm_set_feature_config(devinfo->feature_conf_id,
1889 value);
1890 if (ret)
1891 return ret;
1892
1893 return count;
1894 }
1895
1896 static DEVICE_ATTR_RW(feature_config_value);
1897
1898 static struct attribute *zynqmp_firmware_attrs[] = {
1899 &dev_attr_ggs0.attr,
1900 &dev_attr_ggs1.attr,
1901 &dev_attr_ggs2.attr,
1902 &dev_attr_ggs3.attr,
1903 &dev_attr_pggs0.attr,
1904 &dev_attr_pggs1.attr,
1905 &dev_attr_pggs2.attr,
1906 &dev_attr_pggs3.attr,
1907 &dev_attr_shutdown_scope.attr,
1908 &dev_attr_health_status.attr,
1909 &dev_attr_feature_config_id.attr,
1910 &dev_attr_feature_config_value.attr,
1911 NULL,
1912 };
1913
1914 ATTRIBUTE_GROUPS(zynqmp_firmware);
1915
zynqmp_firmware_probe(struct platform_device * pdev)1916 static int zynqmp_firmware_probe(struct platform_device *pdev)
1917 {
1918 struct device *dev = &pdev->dev;
1919 struct device_node *np;
1920 struct zynqmp_devinfo *devinfo;
1921 int ret;
1922
1923 ret = get_set_conduit_method(dev->of_node);
1924 if (ret)
1925 return ret;
1926
1927 np = of_find_compatible_node(NULL, NULL, "xlnx,zynqmp");
1928 if (!np) {
1929 np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
1930 if (!np)
1931 return 0;
1932
1933 feature_check_enabled = true;
1934 }
1935
1936 if (!feature_check_enabled) {
1937 ret = do_feature_check_call(PM_FEATURE_CHECK);
1938 if (ret >= 0)
1939 feature_check_enabled = true;
1940 }
1941
1942 of_node_put(np);
1943
1944 devinfo = devm_kzalloc(dev, sizeof(*devinfo), GFP_KERNEL);
1945 if (!devinfo)
1946 return -ENOMEM;
1947
1948 devinfo->dev = dev;
1949
1950 platform_set_drvdata(pdev, devinfo);
1951
1952 /* Check PM API version number */
1953 ret = zynqmp_pm_get_api_version(&pm_api_version);
1954 if (ret)
1955 return ret;
1956
1957 if (pm_api_version < ZYNQMP_PM_VERSION) {
1958 panic("%s Platform Management API version error. Expected: v%d.%d - Found: v%d.%d\n",
1959 __func__,
1960 ZYNQMP_PM_VERSION_MAJOR, ZYNQMP_PM_VERSION_MINOR,
1961 pm_api_version >> 16, pm_api_version & 0xFFFF);
1962 }
1963
1964 pr_info("%s Platform Management API v%d.%d\n", __func__,
1965 pm_api_version >> 16, pm_api_version & 0xFFFF);
1966
1967 /* Get the Family code and sub family code of platform */
1968 ret = zynqmp_pm_get_family_info(&pm_family_code, &pm_sub_family_code);
1969 if (ret < 0)
1970 return ret;
1971
1972 /* Check trustzone version number */
1973 ret = zynqmp_pm_get_trustzone_version(&pm_tz_version);
1974 if (ret)
1975 panic("Legacy trustzone found without version support\n");
1976
1977 if (pm_tz_version < ZYNQMP_TZ_VERSION)
1978 panic("%s Trustzone version error. Expected: v%d.%d - Found: v%d.%d\n",
1979 __func__,
1980 ZYNQMP_TZ_VERSION_MAJOR, ZYNQMP_TZ_VERSION_MINOR,
1981 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1982
1983 pr_info("%s Trustzone version v%d.%d\n", __func__,
1984 pm_tz_version >> 16, pm_tz_version & 0xFFFF);
1985
1986 ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs,
1987 ARRAY_SIZE(firmware_devs), NULL, 0, NULL);
1988 if (ret) {
1989 dev_err(&pdev->dev, "failed to add MFD devices %d\n", ret);
1990 return ret;
1991 }
1992
1993 zynqmp_pm_api_debugfs_init();
1994
1995 np = of_find_compatible_node(NULL, NULL, "xlnx,versal");
1996 if (np) {
1997 em_dev = platform_device_register_data(&pdev->dev, "xlnx_event_manager",
1998 -1, NULL, 0);
1999 if (IS_ERR(em_dev))
2000 dev_err_probe(&pdev->dev, PTR_ERR(em_dev), "EM register fail with error\n");
2001 }
2002 of_node_put(np);
2003
2004 return of_platform_populate(dev->of_node, NULL, NULL, dev);
2005 }
2006
zynqmp_firmware_remove(struct platform_device * pdev)2007 static int zynqmp_firmware_remove(struct platform_device *pdev)
2008 {
2009 struct pm_api_feature_data *feature_data;
2010 struct hlist_node *tmp;
2011 int i;
2012
2013 mfd_remove_devices(&pdev->dev);
2014 zynqmp_pm_api_debugfs_exit();
2015
2016 hash_for_each_safe(pm_api_features_map, i, tmp, feature_data, hentry) {
2017 hash_del(&feature_data->hentry);
2018 kfree(feature_data);
2019 }
2020
2021 platform_device_unregister(em_dev);
2022
2023 return 0;
2024 }
2025
2026 static const struct of_device_id zynqmp_firmware_of_match[] = {
2027 {.compatible = "xlnx,zynqmp-firmware"},
2028 {.compatible = "xlnx,versal-firmware"},
2029 {},
2030 };
2031 MODULE_DEVICE_TABLE(of, zynqmp_firmware_of_match);
2032
2033 static struct platform_driver zynqmp_firmware_driver = {
2034 .driver = {
2035 .name = "zynqmp_firmware",
2036 .of_match_table = zynqmp_firmware_of_match,
2037 .dev_groups = zynqmp_firmware_groups,
2038 },
2039 .probe = zynqmp_firmware_probe,
2040 .remove = zynqmp_firmware_remove,
2041 };
2042 module_platform_driver(zynqmp_firmware_driver);
2043