Searched refs:faultmask (Results 1 – 5 of 5) sorted by relevance
395 VMSTATE_UINT32(env.v7m.faultmask[M_REG_NS], ARMCPU),706 VMSTATE_UINT32(env.v7m.faultmask[M_REG_S], ARMCPU),772 env->v7m.faultmask[M_REG_NS] = 1; in get_cpsr()
364 ptr = &env->v7m.faultmask[sec]; in m_sysreg_ptr()
557 uint32_t faultmask[M_REG_NUM_BANKS]; member
1445 env->v7m.faultmask[exc_secure] = 0; in do_v7m_exception_exit()1448 env->v7m.faultmask[M_REG_NS] = 0; in do_v7m_exception_exit()2492 return env->v7m.faultmask[M_REG_NS]; in HELPER()2542 return env->v7m.faultmask[env->v7m.secure]; in HELPER()2621 env->v7m.faultmask[M_REG_NS] = val & 1; in HELPER()2731 env->v7m.faultmask[env->v7m.secure] = val & 1; in HELPER()
372 if (env->v7m.faultmask[M_REG_NS]) { in nvic_exec_prio()386 if (env->v7m.faultmask[M_REG_S]) { in nvic_exec_prio()404 if (s->cpu->env.v7m.faultmask[secure]) { in armv7m_nvic_neg_prio_requested()