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Searched refs:fVSATDW (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/hexagon/mmvec/
H A Dmacros.h309 #define fVSATDW(U, V) fVSATW(((((long long)U) << 32) | fZXTN(32, 64, V))) macro
/openbmc/qemu/target/hexagon/imported/mmvec/
H A Dmacros.def739 DEF_MACRO(fVSATDW,
H A Dext.idef1201 …m 64-bits (higher 32-bits come from first vector) to 32-bits",VdV.w[i] = fVSATDW(VuV.w[i],VvV.w[i]…