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Searched refs:ext_zicsr (Results 1 – 7 of 7) sorted by relevance

/openbmc/qemu/target/riscv/tcg/
H A Dtcg-cpu.c364 if (!cpu->cfg.ext_zicsr) { in riscv_cpu_validate_g()
365 if (!cpu_cfg_ext_is_user_set(CPU_CFG_OFFSET(ext_zicsr))) { in riscv_cpu_validate_g()
366 cpu->cfg.ext_zicsr = true; in riscv_cpu_validate_g()
457 if (riscv_has_ext(env, RVF) && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
542 if (!cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
586 if (cpu->cfg.ext_zcmt && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
606 if (cpu->cfg.ext_zicntr && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
614 if (cpu->cfg.ext_zihpm && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
623 if (!cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
650 if (cpu->cfg.ext_zicfilp && !cpu->cfg.ext_zicsr) { in riscv_cpu_validate_set_extensions()
/openbmc/qemu/target/riscv/
H A Dcpu.c113 ISA_EXT_DATA_ENTRY(zicsr, PRIV_VERSION_1_10_0, ext_zicsr),
488 cpu->cfg.ext_zicsr = true; in rv64_sifive_u_cpu_init()
506 cpu->cfg.ext_zicsr = true; in rv64_sifive_e_cpu_init()
553 cpu->cfg.ext_zicsr = true; in rv64_veyron_v1_cpu_init()
650 cpu->cfg.ext_zicsr = true; in rv32_sifive_u_cpu_init()
668 cpu->cfg.ext_zicsr = true; in rv32_sifive_e_cpu_init()
684 cpu->cfg.ext_zicsr = true; in rv32_ibex_cpu_init()
707 cpu->cfg.ext_zicsr = true; in rv32_imafcu_nommu_cpu_init()
1479 MULTI_EXT_CFG_BOOL("zicsr", ext_zicsr, true),
1617 MULTI_EXT_CFG_BOOL("Zicsr", ext_zicsr, tru
[all...]
H A Dcpu_cfg.h66 bool ext_zicsr; member
H A Dgdbstub.c365 if (cpu->cfg.ext_zicsr) { in riscv_cpu_register_gdb_regs_for_features()
H A Dcsr.c4720 if (!riscv_cpu_cfg(env)->ext_zicsr) { in riscv_csrrw_check()
/openbmc/qemu/hw/riscv/
H A Dboot.c428 if (!harts->harts[0].cfg.ext_zicsr) { in riscv_setup_rom_reset_vec()
/openbmc/qemu/target/riscv/kvm/
H A Dkvm-cpu.c279 KVM_EXT_CFG("zicsr", ext_zicsr, KVM_RISCV_ISA_EXT_ZICSR),