/openbmc/linux/arch/arm64/mm/ |
H A D | fault.c | 73 if (esr & ESR_ELx_ISV) { in data_abort_decode() 106 ESR_ELx_EC(esr), esr_get_class_string(esr), in mem_abort_decode() 118 data_abort_decode(esr); in mem_abort_decode() 262 if (!is_el1_data_abort(esr) && !is_el1_instruction_abort(esr)) in is_el1_permission_fault() 317 mem_abort_decode(esr); in die_kernel_fault() 320 die("Oops", regs, esr); in die_kernel_fault() 470 esr = 0; in set_thread_esr() 527 return (esr & ESR_ELx_WNR) && !(esr & ESR_ELx_CM); in is_write_abort() 581 addr, esr, regs); in do_page_fault() 585 addr, esr, regs); in do_page_fault() [all …]
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/openbmc/linux/arch/arm64/kernel/ |
H A D | entry-common.c | 465 el1_pc(regs, esr); in el1h_64_sync_handler() 472 el1_bti(regs, esr); in el1h_64_sync_handler() 478 el1_dbg(regs, esr); in el1h_64_sync_handler() 699 el0_da(regs, esr); in el0t_64_sync_handler() 702 el0_ia(regs, esr); in el0t_64_sync_handler() 718 el0_sys(regs, esr); in el0t_64_sync_handler() 721 el0_sp(regs, esr); in el0t_64_sync_handler() 724 el0_pc(regs, esr); in el0t_64_sync_handler() 831 el0_da(regs, esr); in el0t_32_sync_handler() 834 el0_ia(regs, esr); in el0t_32_sync_handler() [all …]
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H A D | traps.c | 257 if (esr) in arm64_show_signal() 258 pr_cont("%s, ESR 0x%016lx, ", esr_get_class_string(esr), esr); in arm64_show_signal() 815 do_el0_undef(regs, esr); in do_el0_cp15() 830 do_el0_undef(regs, esr); in do_el0_cp15() 849 do_el0_undef(regs, esr); in do_el0_sys() 933 pr_emerg("ESR: 0x%016lx -- %s\n", esr, esr_get_class_string(esr)); in panic_bad_stack() 959 smp_processor_id(), esr, esr_get_class_string(esr)); in arm64_serror_panic() 1003 if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(regs, esr)) in do_serror() 1099 #define KASAN_ESR_SIZE(esr) (1 << ((esr) & KASAN_ESR_SIZE_MASK)) argument 1143 die(report_ubsan_failure(regs, esr & UBSAN_BRK_MASK), regs, esr); in ubsan_handler() [all …]
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H A D | debug-monitors.c | 205 static int call_step_hook(struct pt_regs *regs, unsigned long esr) in call_step_hook() argument 218 retval = hook->fn(regs, esr); in call_step_hook() 241 static int single_step_handler(unsigned long unused, unsigned long esr, in single_step_handler() argument 253 if (!handler_found && call_step_hook(regs, esr) == DBG_HOOK_HANDLED) in single_step_handler() 302 static int call_break_hook(struct pt_regs *regs, unsigned long esr) in call_break_hook() argument 306 int (*fn)(struct pt_regs *regs, unsigned long esr) = NULL; in call_break_hook() 315 unsigned long comment = esr & ESR_ELx_BRK64_ISS_COMMENT_MASK; in call_break_hook() 321 return fn ? fn(regs, esr) : DBG_HOOK_ERROR; in call_break_hook() 325 static int brk_handler(unsigned long unused, unsigned long esr, in brk_handler() argument 328 if (call_break_hook(regs, esr) == DBG_HOOK_HANDLED) in brk_handler()
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/openbmc/linux/arch/arm64/include/asm/ |
H A D | exception.h | 19 unsigned long esr = ESR_ELx_EC_SERROR << ESR_ELx_EC_SHIFT; in disr_to_esr() local 22 esr |= (disr & DISR_EL1_ESR_MASK); in disr_to_esr() 24 esr |= (disr & ESR_ELx_ISS_MASK); in disr_to_esr() 26 return esr; in disr_to_esr() 56 void do_el0_undef(struct pt_regs *regs, unsigned long esr); 59 void do_el1_bti(struct pt_regs *regs, unsigned long esr); 63 void do_sve_acc(unsigned long esr, struct pt_regs *regs); 64 void do_sme_acc(unsigned long esr, struct pt_regs *regs); 66 void do_el0_sys(unsigned long esr, struct pt_regs *regs); 69 void do_el0_cp15(unsigned long esr, struct pt_regs *regs); [all …]
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H A D | traps.h | 32 int early_brk64(unsigned long addr, unsigned long esr, struct pt_regs *regs); 61 static inline bool arm64_is_ras_serror(unsigned long esr) in arm64_is_ras_serror() argument 65 if (esr & ESR_ELx_IDS) in arm64_is_ras_serror() 81 static inline unsigned long arm64_ras_serror_get_severity(unsigned long esr) in arm64_ras_serror_get_severity() argument 83 unsigned long aet = esr & ESR_ELx_AET; in arm64_ras_serror_get_severity() 85 if (!arm64_is_ras_serror(esr)) { in arm64_ras_serror_get_severity() 94 if ((esr & ESR_ELx_FSC) != ESR_ELx_FSC_SERROR) { in arm64_ras_serror_get_severity() 102 bool arm64_is_fatal_ras_serror(struct pt_regs *regs, unsigned long esr); 103 void __noreturn arm64_serror_panic(struct pt_regs *regs, unsigned long esr);
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H A D | esr.h | 74 #define ESR_ELx_EC(esr) (((esr) & ESR_ELx_EC_MASK) >> ESR_ELx_EC_SHIFT) argument 79 #define ESR_ELx_ISS(esr) ((esr) & ESR_ELx_ISS_MASK) argument 82 #define ESR_ELx_ISS2(esr) (((esr) & ESR_ELx_ISS2_MASK) >> ESR_ELx_ISS2_SHIFT) argument 221 #define ESR_ELx_SYS64_ISS_RT(esr) \ argument 222 (((esr) & ESR_ELx_SYS64_ISS_RT_MASK) >> ESR_ELx_SYS64_ISS_RT_SHIFT) 381 #define ESR_ELx_MOPS_ISS_DESTREG(esr) (((esr) & (UL(0x1f) << 10)) >> 10) argument 382 #define ESR_ELx_MOPS_ISS_SRCREG(esr) (((esr) & (UL(0x1f) << 5)) >> 5) argument 383 #define ESR_ELx_MOPS_ISS_SIZEREG(esr) (((esr) & (UL(0x1f) << 0)) >> 0) argument 388 static inline bool esr_is_data_abort(unsigned long esr) in esr_is_data_abort() argument 390 const unsigned long ec = ESR_ELx_EC(esr); in esr_is_data_abort() [all …]
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H A D | debug-monitors.h | 67 int (*fn)(struct pt_regs *regs, unsigned long esr); 78 int (*fn)(struct pt_regs *regs, unsigned long esr);
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/openbmc/u-boot/arch/arm/lib/ |
H A D | interrupts_64.c | 47 void do_bad_sync(struct pt_regs *pt_regs, unsigned int esr) in do_bad_sync() argument 58 void do_bad_irq(struct pt_regs *pt_regs, unsigned int esr) in do_bad_irq() argument 61 printf("Bad mode in \"Irq\" handler, esr 0x%08x\n", esr); in do_bad_irq() 69 void do_bad_fiq(struct pt_regs *pt_regs, unsigned int esr) in do_bad_fiq() argument 72 printf("Bad mode in \"Fiq\" handler, esr 0x%08x\n", esr); in do_bad_fiq() 91 void do_sync(struct pt_regs *pt_regs, unsigned int esr) in do_sync() argument 102 void do_irq(struct pt_regs *pt_regs, unsigned int esr) in do_irq() argument 105 printf("\"Irq\" handler, esr 0x%08x\n", esr); in do_irq() 113 void do_fiq(struct pt_regs *pt_regs, unsigned int esr) in do_fiq() argument 116 printf("\"Fiq\" handler, esr 0x%08x\n", esr); in do_fiq() [all …]
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/openbmc/linux/arch/arm64/kvm/ |
H A D | inject_fault.c | 61 u64 esr = 0; in inject_abt64() local 70 esr |= ESR_ELx_IL; in inject_abt64() 84 esr |= ESR_ELx_FSC_EXTABT; in inject_abt64() 88 vcpu_write_sys_reg(vcpu, esr, ESR_EL1); in inject_abt64() 91 vcpu_write_sys_reg(vcpu, esr, ESR_EL2); in inject_abt64() 106 esr |= ESR_ELx_IL; in inject_undef64() 109 vcpu_write_sys_reg(vcpu, esr, ESR_EL1); in inject_undef64() 111 vcpu_write_sys_reg(vcpu, esr, ESR_EL2); in inject_undef64() 192 unsigned long addr, esr; in kvm_inject_size_fault() local 213 esr = vcpu_read_sys_reg(vcpu, ESR_EL1); in kvm_inject_size_fault() [all …]
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H A D | handle_exit.c | 33 if (!arm64_is_ras_serror(esr) || arm64_is_fatal_ras_serror(NULL, esr)) in kvm_handle_guest_serror() 116 u64 esr = kvm_vcpu_get_esr(vcpu); in kvm_handle_wfx() local 118 if (esr & ESR_ELx_WFx_ISS_WFE) { in kvm_handle_wfx() 126 if (esr & ESR_ELx_WFx_ISS_WFxT) { in kvm_handle_wfx() 127 if (esr & ESR_ELx_WFx_ISS_RV) { in kvm_handle_wfx() 137 esr &= ~ESR_ELx_WFx_ISS_WFxT; in kvm_handle_wfx() 141 if (esr & ESR_ELx_WFx_ISS_WFE) { in kvm_handle_wfx() 144 if (esr & ESR_ELx_WFx_ISS_WFxT) in kvm_handle_wfx() 176 switch (ESR_ELx_EC(esr)) { in kvm_handle_guest_debug() 193 esr, esr_get_class_string(esr)); in kvm_handle_unknown_ec() [all …]
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H A D | sys_regs.h | 39 .Op1 = ((esr) >> 14) & 0x7, \ 40 .CRn = ((esr) >> 10) & 0xf, \ 41 .CRm = ((esr) >> 1) & 0xf, \ 42 .Op2 = ((esr) >> 17) & 0x7, \ 43 .is_write = !((esr) & 1) }) 45 #define esr_cp1x_32_to_params(esr) \ argument 46 ((struct sys_reg_params){ .Op1 = ((esr) >> 14) & 0x7, \ 47 .CRn = ((esr) >> 10) & 0xf, \ 48 .CRm = ((esr) >> 1) & 0xf, \ 49 .Op2 = ((esr) >> 17) & 0x7, \ [all …]
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/openbmc/qemu/target/microblaze/ |
H A D | helper.c | 85 env->esr |= (access_type == MMU_DATA_STORE) << 10; in mb_cpu_tlb_fill() 132 env->esr &= ~D_FLAG; in mb_cpu_do_interrupt() 134 env->esr |= D_FLAG; in mb_cpu_do_interrupt() 152 env->esr &= ~D_FLAG; in mb_cpu_do_interrupt() 154 env->esr |= D_FLAG; in mb_cpu_do_interrupt() 217 } else if (env->esr & D_FLAG) { in mb_cpu_do_interrupt() 224 env->pc, msr, env->esr); in mb_cpu_do_interrupt() 276 uint32_t esr, iflags; in mb_cpu_do_unaligned_access() local 286 esr = ESR_EC_UNALIGNED_DATA; in mb_cpu_do_unaligned_access() 288 esr |= iflags & ESR_ESS_MASK; in mb_cpu_do_unaligned_access() [all …]
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H A D | gdbstub.c | 69 val = env->esr; in mb_cpu_gdb_read_register() 137 env->esr = tmp; in mb_cpu_gdb_write_register()
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/openbmc/linux/arch/alpha/kernel/ |
H A D | core_lca.c | 341 ((esr & ESR_CEE) ? "Correctable" : in mem_error() 342 (esr & ESR_UEE) ? "Uncorrectable" : "A"), in mem_error() 343 (esr & ESR_WRE) ? "write" : "read", in mem_error() 346 if (esr & ESR_CTE) { in mem_error() 349 if (esr & ESR_MSE) { in mem_error() 352 if (esr & ESR_MHE) { in mem_error() 355 if (esr & ESR_NXM) { in mem_error() 435 if (el.s->esr & ESR_EAV) { in lca_machine_check() 436 mem_error(el.s->esr, el.s->ear); in lca_machine_check() 450 if (el.l->esr & ESR_EAV) { in lca_machine_check() [all …]
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/openbmc/qemu/linux-user/include/host/aarch64/ |
H A D | host-signal.h | 22 uint64_t esr; member 60 uint64_t esr = ec->esr; in host_signal_write() local 63 return extract32(esr, 27, 5) == 0x12 && extract32(esr, 6, 1) == 1; in host_signal_write()
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/openbmc/linux/arch/sh/boards/mach-dreamcast/ |
H A D | irq.c | 90 __u32 esr = ESR_BASE + (LEVEL(irq) << 2); in mask_ack_systemasic_irq() local 92 outl((1 << EVENT_BIT(irq)), esr); in mask_ack_systemasic_irq() 107 __u32 emr, esr, status, level; in systemasic_irq_demux() local 124 esr = ESR_BASE + (level << 2); in systemasic_irq_demux() 127 status = inl(esr); in systemasic_irq_demux()
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/openbmc/linux/arch/arm64/kvm/hyp/include/hyp/ |
H A D | fault.h | 44 static inline bool __get_fault_info(u64 esr, struct kvm_vcpu_fault_info *fault) in __get_fault_info() argument 61 if (!(esr & ESR_ELx_S1PTW) && in __get_fault_info() 63 (esr & ESR_ELx_FSC_TYPE) == ESR_ELx_FSC_PERM)) { in __get_fault_info()
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/openbmc/linux/drivers/net/can/ |
H A D | bxcan.c | 158 u32 esr; /* 0x18 - error status */ member 482 if (esr & BXCAN_ESR_BOFF) in bxcan_handle_state_change() 484 else if (esr & BXCAN_ESR_EPVF) in bxcan_handle_state_change() 486 else if (esr & BXCAN_ESR_EWGF) in bxcan_handle_state_change() 524 lec_code = FIELD_GET(BXCAN_ESR_LEC_MASK, esr); in bxcan_handle_bus_err() 607 u32 msr, esr; in bxcan_state_change_isr() local 613 esr = readl(®s->esr); in bxcan_state_change_isr() 614 bxcan_handle_state_change(ndev, esr); in bxcan_state_change_isr() 617 bxcan_handle_bus_err(ndev, esr); in bxcan_state_change_isr() 916 u32 esr; in bxcan_get_berr_counter() local [all …]
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/openbmc/linux/drivers/net/ethernet/ibm/emac/ |
H A D | mal.c | 222 u32 esr = get_mal_dcrn(mal, MAL_ESR); in mal_serr() local 225 set_mal_dcrn(mal, MAL_ESR, esr); in mal_serr() 227 MAL_DBG(mal, "SERR %08x" NL, esr); in mal_serr() 229 if (esr & MAL_ESR_EVB) { in mal_serr() 230 if (esr & MAL_ESR_DE) { in mal_serr() 237 if (esr & MAL_ESR_PEIN) { in mal_serr() 245 mal->index, esr); in mal_serr() 255 mal->index, esr); in mal_serr() 357 if (esr & MAL_ESR_EVB) { in mal_int() 359 if (esr & MAL_ESR_DE) { in mal_int() [all …]
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/openbmc/u-boot/arch/arm/include/asm/ |
H A D | u-boot-arm.h | 48 void do_fiq(struct pt_regs *pt_regs, unsigned int esr); 49 void do_irq(struct pt_regs *pt_regs, unsigned int esr);
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/openbmc/linux/sound/soc/fsl/ |
H A D | fsl_esai.c | 102 u32 esr; in esai_isr() local 121 if (esr & ESAI_ESR_RFF_MASK) in esai_isr() 124 if (esr & ESAI_ESR_TFE_MASK) in esai_isr() 127 if (esr & ESAI_ESR_TLS_MASK) in esai_isr() 130 if (esr & ESAI_ESR_TDE_MASK) in esai_isr() 133 if (esr & ESAI_ESR_TED_MASK) in esai_isr() 136 if (esr & ESAI_ESR_TD_MASK) in esai_isr() 139 if (esr & ESAI_ESR_RLS_MASK) in esai_isr() 142 if (esr & ESAI_ESR_RDE_MASK) in esai_isr() 145 if (esr & ESAI_ESR_RED_MASK) in esai_isr() [all …]
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/openbmc/linux/arch/powerpc/platforms/44x/ |
H A D | machine_check.c | 14 unsigned long reason = regs->esr; in machine_check_440A() 51 unsigned long reason = regs->esr; in machine_check_47x()
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/openbmc/qemu/linux-user/microblaze/ |
H A D | cpu_loop.c | 72 env->esr |= 1 << 12; in cpu_loop() 77 switch (env->esr & 31) { in cpu_loop() 108 env->esr & ESR_EC_MASK); in cpu_loop()
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/openbmc/linux/arch/mips/include/asm/octeon/ |
H A D | cvmx-sli-defs.h | 107 __BITFIELD_FIELD(uint64_t esr:2, 119 __BITFIELD_FIELD(uint64_t esr:2,
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