Searched refs:enable_base (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/drivers/irqchip/ |
| H A D | irq-sifive-plic.c | 83 void __iomem *enable_base; member
93 static void __plic_toggle(void __iomem *enable_base, int hwirq, int enable) in __plic_toggle() argument
95 u32 __iomem *reg = enable_base + (hwirq / 32) * sizeof(u32); in __plic_toggle()
107 __plic_toggle(handler->enable_base, hwirq, enable); in plic_toggle()
265 reg = handler->enable_base + i * sizeof(u32); in plic_irq_suspend()
296 reg = handler->enable_base + i * sizeof(u32); in plic_irq_resume()
477 void __iomem *enable_base = priv->regs + in __plic_init() local
482 __plic_toggle(enable_base, hwirq, 0); in __plic_init()
524 handler->enable_base = priv->regs + CONTEXT_ENABLE_BASE + in __plic_init()
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| /openbmc/qemu/include/hw/intc/ |
| H A D | sifive_plic.h | 69 uint32_t enable_base; member
83 uint32_t pending_base, uint32_t enable_base,
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| /openbmc/qemu/hw/intc/ |
| H A D | sifive_plic.c | 151 } else if (addr_between(addr, plic->enable_base, in sifive_plic_read()
153 uint32_t addrid = (addr - plic->enable_base) / plic->enable_stride; in sifive_plic_read()
210 } else if (addr_between(addr, plic->enable_base, in sifive_plic_write()
212 uint32_t addrid = (addr - plic->enable_base) / plic->enable_stride; in sifive_plic_write()
437 DEFINE_PROP_UINT32("enable-base", SiFivePLICState, enable_base, 0),
476 uint32_t pending_base, uint32_t enable_base, in type_init()
492 qdev_prop_set_uint32(dev, "enable-base", enable_base); in type_init()
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