Searched refs:emif_pwr_mgmt_ctrl (Results 1 – 3 of 3) sorted by relevance
28 reg = readl(&emif->emif_pwr_mgmt_ctrl); in set_lpmode_selfrefresh()32 writel(reg, &emif->emif_pwr_mgmt_ctrl); in set_lpmode_selfrefresh()35 readl(&emif->emif_pwr_mgmt_ctrl); in set_lpmode_selfrefresh()178 writel(0, &emif->emif_pwr_mgmt_ctrl); in emif_update_timings()180 writel(EMIF_PWR_MGMT_CTRL, &emif->emif_pwr_mgmt_ctrl); in emif_update_timings()207 & EMIF_REG_LP_MODE_MASK), &emif->emif_pwr_mgmt_ctrl); in omap5_ddr3_leveling()226 & EMIF_REG_LP_MODE_MASK), &emif->emif_pwr_mgmt_ctrl); in omap5_ddr3_leveling()406 writel(0x0, &emif->emif_pwr_mgmt_ctrl); in dra7_ddr3_init()1310 writel(0x80000000, &emif->emif_pwr_mgmt_ctrl); in emif_post_init_config()
83 writel(0xA0, &emif_reg[nr]->emif_pwr_mgmt_ctrl); in config_sdram_emif4d5()
653 u32 emif_pwr_mgmt_ctrl; member