Searched refs:emif_ddr_phy_ctrl_1_shdw (Results 1 – 3 of 3) sorted by relevance
168 writel(regs->emif_ddr_phy_ctlr_1, &emif_reg[nr]->emif_ddr_phy_ctrl_1_shdw); in config_sdram()319 &emif_reg[nr]->emif_ddr_phy_ctrl_1_shdw); in config_ddr_phy()
186 writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1_shdw); in emif_update_timings()222 &emif->emif_ddr_phy_ctrl_1_shdw); in omap5_ddr3_leveling()292 writel(regs->emif_ddr_phy_ctlr_1, &emif->emif_ddr_phy_ctrl_1_shdw); in update_hwleveling_output()
691 u32 emif_ddr_phy_ctrl_1_shdw; member