Searched refs:ecc_ctrl (Results 1 – 4 of 4) sorted by relevance
| /openbmc/u-boot/cmd/ti/ |
| H A D | ddr3.c | 189 u32 ecc_ctrl = readl(&emif->emif_ecc_ctrl_reg); in ddr_memory_ecc_err() local
210 ecc_ctrl = ECC_START_ADDR1 | (ECC_END_ADDR1 << 16); in ddr_memory_ecc_err()
211 writel(ecc_ctrl, EMIF1_BASE + KS2_DDR3_ECC_ADDR_RANGE1_OFFSET); in ddr_memory_ecc_err()
214 writel(ecc_ctrl, &emif->emif_ecc_ctrl_reg); in ddr_memory_ecc_err()
231 u32 start_addr, end_addr, range, ecc_ctrl; in is_addr_valid() local
234 ecc_ctrl = EMIF_ECC_REG_ECC_ADDR_RGN_1_EN_MASK; in is_addr_valid()
237 ecc_ctrl = readl(&emif->emif_ecc_ctrl_reg); in is_addr_valid()
242 if (ecc_ctrl & EMIF_ECC_REG_ECC_ADDR_RGN_1_EN_MASK) { in is_addr_valid()
253 if (ecc_ctrl & EMIF_ECC_REG_ECC_ADDR_RGN_2_EN_MASK) { in is_addr_valid()
270 u32 ecc_ctrl = readl(&emif->emif_ecc_ctrl_reg); in is_ecc_enabled() local
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| /openbmc/u-boot/arch/arm/mach-keystone/ |
| H A D | init.c | 40 u32 ecc_ctrl[KS2_OSR_NUM_RAM_BANKS]; in osr_init() local
62 ecc_ctrl[i] = readl(base + KS2_OSR_ECC_CTRL) ^ in osr_init()
65 writel(ecc_ctrl[i], KS2_MSMC_DATA_BASE + i * 4); in osr_init()
66 writel(ecc_ctrl[i], base + KS2_OSR_ECC_CTRL); in osr_init()
75 writel(ecc_ctrl[i] | in osr_init()
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| /openbmc/u-boot/drivers/mtd/nand/raw/ |
| H A D | lpc32xx_nand_slc.c | 171 u32 i, dmasrc, ctrl, ecc_ctrl, oob_ctrl, dmadst; in lpc32xx_nand_dma_configure() local
179 ecc_ctrl = 0x5 | in lpc32xx_nand_dma_configure()
254 dmalist_cur_ecc->next_ctrl = ecc_ctrl; in lpc32xx_nand_dma_configure()
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| /openbmc/u-boot/arch/x86/cpu/quark/ |
| H A D | smc.c | 2547 u32 ecc_ctrl; in ecc_enable() local
2567 ecc_ctrl = (DECCCTRL_SBEEN | DECCCTRL_DBEEN | DECCCTRL_ENCBGEN); in ecc_enable()
2568 msg_port_write(MEM_CTLR, DECCCTRL, ecc_ctrl); in ecc_enable()
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