Searched refs:dramtype (Results 1 – 11 of 11) sorted by relevance
151 if ((sdram_ch->rank == 1) && (sdram_params->base.dramtype == DDR3)) in set_memory_map()166 if (sdram_params->base.dramtype == LPDDR4) { in set_ds_odt()176 } else if (sdram_params->base.dramtype == LPDDR3) { in set_ds_odt()305 if (sdram_params->base.dramtype == LPDDR4) { in phy_io_config()311 } else if (sdram_params->base.dramtype == LPDDR3) { in phy_io_config()371 } else if (sdram_params->base.dramtype == DDR3) { in phy_io_config()398 if (sdram_params->base.dramtype == LPDDR4) in phy_io_config()400 else if (sdram_params->base.dramtype == LPDDR3) in phy_io_config()402 else if (sdram_params->base.dramtype == DDR3) in phy_io_config()865 if (sdram_params->base.dramtype == LPDDR4) { in data_training()[all …]
171 static void dfi_cfg(struct rk3288_ddr_pctl *pctl, u32 dramtype) in dfi_cfg() argument248 switch (sdram_params->base.dramtype) { in pctl_cfg()317 switch (sdram_params->base.dramtype) { in phy_cfg()384 u32 dramtype) in memory_init() argument389 | (dramtype == DDR3 ? PIR_DRAMRST : 0))); in memory_init()486 if (sdram_params->base.dramtype != LPDDR3) in data_training()526 if (sdram_params->base.dramtype != LPDDR3) in data_training()595 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()657 if (sdram_params->base.dramtype == LPDDR3) { in sdram_rank_bw_detect()788 if ((sdram_params->base.dramtype == DDR3 && in sdram_init()[all …]
166 u32 dramtype = sdram_params->base.dramtype; in memory_init() local168 if (dramtype == DDR3) { in memory_init()222 if (dramtype == LPDDR3) in memory_init()406 u32 dramtype = sdram_params->base.dramtype; in pctl_cfg() local425 if (dramtype == DDR3) { in pctl_cfg()446 if (dramtype == LPDDR2) { in pctl_cfg()484 switch (sdram_params->base.dramtype) { in phy_cfg()502 if (sdram_params->base.dramtype == LPDDR2) in phy_cfg()583 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()607 if (sdram_params->base.dramtype == DDR3) in dram_cap_detect()
172 static void dfi_cfg(struct rk3288_ddr_pctl *pctl, u32 dramtype) in dfi_cfg() argument232 switch (sdram_params->base.dramtype) { in pctl_cfg()280 switch (sdram_params->base.dramtype) { in phy_cfg()326 u32 dramtype) in memory_init() argument331 | (dramtype == DDR3 ? PIR_DRAMRST : 0))); in memory_init()428 if (sdram_params->base.dramtype != LPDDR3) in data_training()468 if (sdram_params->base.dramtype != LPDDR3) in data_training()538 sys_reg |= sdram_params->base.dramtype << SYS_REG_DDRTYPE_SHIFT; in dram_all_config()604 if (sdram_params->base.dramtype == LPDDR3) { in sdram_rank_bw_detect()716 if ((sdram_params->base.dramtype == DDR3 && in sdram_init()[all …]
32 int dramtype; member
97 unsigned int dramtype; member
93 u32 dramtype; member
270 u32 dramtype; member
164 u32 dramtype : 3; member
1052 if (drp0[ch].dramtype != 0) { in check_channel()
1524 int index, u8 rankno, u8 chab, const u8 dramtype[][5], int bw) in sisusb_set_rank()1531 if ((rankno == 2) && (dramtype[index][0] == 2)) in sisusb_set_rank()1534 ranksize = dramtype[index][3] / 2 * bw / 32; in sisusb_set_rank()