Searched refs:dramtmg1 (Results 1 – 14 of 14) sorted by relevance
34 .dramtmg1 = 0x0007020d,
54 writel(ddrc_regs_val->dramtmg1, &ddrc_regs->dramtmg1); in mx7_dram_cfg()
29 u32 dramtmg1; /* 0x0104 */ member
44 .dramtmg1 = 0x0007020E,
85 u32 dramtmg1; /* 0x5c dram timing parameters register 1 */ member
121 u32 dramtmg1; /* 0x104 */ member
72 u32 dramtmg1; member
47 u32 dramtmg1; /* 0x104 SDRAM Timing 1*/ member
77 DDRCTL_REG_TIMING(dramtmg1),
141 writel(reg_val, &mctl_ctl->dramtmg1); in auto_set_timing_para()
163 &mctl_ctl->dramtmg1); in mctl_init()
173 writel(reg_val, &mctl_ctl->dramtmg1); in auto_set_timing_para()
35 u32 dramtmg1; member132 u32 dramtmg1; member