| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn321/ |
| H A D | dcn321_fpu.c | 118 .dram_speed_mts = 16000.0,
176 } else if (entry->dram_speed_mts > 0) { in get_optimal_ntuple()
301 if ((table[i].dram_speed_mts > table[i+1].dram_speed_mts) || in remove_inconsistent_entries()
437 entry.dram_speed_mts = 0; in build_synthetic_soc_states()
447 entry.dram_speed_mts = 0; in build_synthetic_soc_states()
469 entry.dram_speed_mts = 0; in build_synthetic_soc_states()
480 entry.dram_speed_mts = 0; in build_synthetic_soc_states()
563 table[i].dram_speed_mts == table[i + 1].dram_speed_mts) in build_synthetic_soc_states()
820 if (!dram_speed_mts[i] && i > 0) in dcn321_update_bw_bounding_box_fpu()
821 dcn3_21_soc.clock_limits[i].dram_speed_mts = dcn3_21_soc.clock_limits[i-1].dram_speed_mts; in dcn321_update_bw_bounding_box_fpu()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn303/ |
| H A D | dcn303_fpu.c | 197 unsigned int dram_speed_mts[DC__VOLTAGE_STATES] = {0}; in dcn303_fpu_update_bw_bounding_box() local
279 dram_speed_mts[num_states++] = optimal_uclk_for_dcfclk_sta_targets[i++]; in dcn303_fpu_update_bw_bounding_box()
283 dram_speed_mts[num_states++] = in dcn303_fpu_update_bw_bounding_box()
293 dram_speed_mts[num_states++] = optimal_uclk_for_dcfclk_sta_targets[i++]; in dcn303_fpu_update_bw_bounding_box()
299 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn303_fpu_update_bw_bounding_box()
307 dcn3_03_soc.clock_limits[i].dram_speed_mts = dram_speed_mts[i]; in dcn303_fpu_update_bw_bounding_box()
330 if (dcn3_03_soc.clock_limits[i].dram_speed_mts > 1700) in dcn303_fpu_update_bw_bounding_box()
333 if (dcn3_03_soc.clock_limits[i].dram_speed_mts >= 1500) { in dcn303_fpu_update_bw_bounding_box()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn302/ |
| H A D | dcn302_fpu.c | 201 unsigned int dram_speed_mts[DC__VOLTAGE_STATES] = {0}; in dcn302_fpu_update_bw_bounding_box() local
285 dram_speed_mts[num_states++] = optimal_uclk_for_dcfclk_sta_targets[i++]; in dcn302_fpu_update_bw_bounding_box()
289 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn302_fpu_update_bw_bounding_box()
298 dram_speed_mts[num_states++] = optimal_uclk_for_dcfclk_sta_targets[i++]; in dcn302_fpu_update_bw_bounding_box()
304 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn302_fpu_update_bw_bounding_box()
312 dcn3_02_soc.clock_limits[i].dram_speed_mts = dram_speed_mts[i]; in dcn302_fpu_update_bw_bounding_box()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn301/ |
| H A D | dcn301_fpu.c | 116 .dram_speed_mts = 2400.0,
128 .dram_speed_mts = 2400.0,
140 .dram_speed_mts = 4267.0,
152 .dram_speed_mts = 4267.0,
164 .dram_speed_mts = 4267.0,
354 s[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2; in dcn301_update_bw_bounding_box()
394 …_sets[i].min_fill_clk_mhz = (i > 0) ? (loaded_bb->clock_limits[i - 1].dram_speed_mts / 16) + 1 : 0; in dcn301_fpu_set_wm_ranges()
395 ranges->reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16; in dcn301_fpu_set_wm_ranges()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 230 .dram_speed_mts = 8960.0,
241 .dram_speed_mts = 11104.0,
252 .dram_speed_mts = 14000.0,
341 .dram_speed_mts = 8960.0,
452 .dram_speed_mts = 1069.0,
463 .dram_speed_mts = 1324.0,
474 .dram_speed_mts = 1670.0,
485 .dram_speed_mts = 2000.0,
496 .dram_speed_mts = 2000.0,
507 .dram_speed_mts = 2000.0,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 129 .dram_speed_mts = 18000.0,
479 } else if (entry->dram_speed_mts > 0) { in get_optimal_ntuple()
2405 if ((table[i].dram_speed_mts > table[i+1].dram_speed_mts) || in remove_inconsistent_entries()
2541 entry.dram_speed_mts = 0; in build_synthetic_soc_states()
2551 entry.dram_speed_mts = 0; in build_synthetic_soc_states()
2573 entry.dram_speed_mts = 0; in build_synthetic_soc_states()
2584 entry.dram_speed_mts = 0; in build_synthetic_soc_states()
2665 table[i].dram_speed_mts == table[i + 1].dram_speed_mts) in build_synthetic_soc_states()
2916 if (!dram_speed_mts[i] && i > 0) in dcn32_update_bw_bounding_box_fpu()
2917 dcn3_2_soc.clock_limits[i].dram_speed_mts = dcn3_2_soc.clock_limits[i-1].dram_speed_mts; in dcn32_update_bw_bounding_box_fpu()
[all …]
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/ |
| H A D | dcn30_fpu.c | 500 dc->clk_mgr->bw_params->dummy_pstate_table[dummy_latency_index].dram_speed_mts) in dcn30_fpu_calculate_wm_and_dlg()
575 if (dc->dml.soc.clock_limits[i].dram_speed_mts > 1700) { in dcn30_fpu_calculate_wm_and_dlg()
576 context->bw_ctx.dml.vba.DRAMSpeed = dc->dml.soc.clock_limits[i].dram_speed_mts; in dcn30_fpu_calculate_wm_and_dlg()
643 unsigned int *dram_speed_mts) in dcn30_fpu_update_bw_bounding_box() argument
656 dcn3_0_soc.clock_limits[i].dram_speed_mts = dram_speed_mts[i]; in dcn30_fpu_update_bw_bounding_box()
770 base->bw_params->dummy_pstate_table[0].dram_speed_mts = 1600; in dcn3_fpu_build_wm_range_table()
772 base->bw_params->dummy_pstate_table[1].dram_speed_mts = 8000; in dcn3_fpu_build_wm_range_table()
774 base->bw_params->dummy_pstate_table[2].dram_speed_mts = 10000; in dcn3_fpu_build_wm_range_table()
776 base->bw_params->dummy_pstate_table[3].dram_speed_mts = 16000; in dcn3_fpu_build_wm_range_table()
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| H A D | dcn30_fpu.h | 64 unsigned int *dram_speed_mts);
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_socbb.h | 31 uint32_t dram_speed_mts; member
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn201/ |
| H A D | dcn201_resource.c | 150 .dram_speed_mts = 2000.0,
161 .dram_speed_mts = 3600.0,
172 .dram_speed_mts = 6800.0,
183 .dram_speed_mts = 14000.0,
194 .dram_speed_mts = 14000.0,
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | clk_mgr.h | 223 unsigned int dram_speed_mts; member
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/ |
| H A D | dcn31_fpu.c | 624 s[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * in dcn31_update_bw_bounding_box()
692 …dcn3_15_soc.clock_limits[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2 * clk_table->ent… in dcn315_update_bw_bounding_box()
776 s[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * in dcn316_update_bw_bounding_box()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dcn30/ |
| H A D | dcn30_resource.c | 2095 unsigned int dram_speed_mts[DC__VOLTAGE_STATES] = {0}; in dcn30_update_bw_bounding_box() local
2177 dram_speed_mts[num_states++] = optimal_uclk_for_dcfclk_sta_targets[i++]; in dcn30_update_bw_bounding_box()
2181 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn30_update_bw_bounding_box()
2190 dram_speed_mts[num_states++] = optimal_uclk_for_dcfclk_sta_targets[i++]; in dcn30_update_bw_bounding_box()
2196 dram_speed_mts[num_states++] = bw_params->clk_table.entries[j++].memclk_mhz * 16; in dcn30_update_bw_bounding_box()
2201 dcn30_fpu_update_bw_bounding_box(dc, bw_params, &dcn30_bb_max_clk, dcfclk_mhz, dram_speed_mts); in dcn30_update_bw_bounding_box()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 163 double dram_speed_mts; member
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| H A D | display_mode_vba.c | 382 mode_lib->vba.DRAMSpeed = soc->clock_limits[i].dram_speed_mts; in fetch_socbb_params()
403 mode_lib->vba.DRAMSpeedPerState[i] = soc->clock_limits[i].dram_speed_mts; in fetch_socbb_params()
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| /openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn314/ |
| H A D | dcn314_fpu.c | 241 …clock_limits[i].dram_speed_mts = clk_table->entries[i].memclk_mhz * 2 * clk_table->entries[i].wck_… in dcn314_update_bw_bounding_box_fpu()
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