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Searched refs:dqs_wr_idx (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_hw_training.c792 u32 val, reg, idx, dqs_wr_idx = 0, crc = 0; in ddr3_read_training_results() local
829 val = (training_val[dqs_wr_idx++] & 0x3F); in ddr3_read_training_results()