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Searched refs:dpll_sdiv (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-exynos/
H A Dclock_init.h70 unsigned dpll_sdiv; member
H A Dclock_init_exynos5.c170 .dpll_sdiv = 0x2,
855 val = set_pll(mem->dpll_mdiv, mem->dpll_pdiv, mem->dpll_sdiv); in exynos5420_system_clock_init()