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Searched refs:dphy_timing (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/media/platform/renesas/rzg2l-cru/
H A Drzg2l-csi2.c296 const struct rzg2l_csi2_timings *dphy_timing; in rzg2l_csi2_dphy_enable() local
310 dphy_timing = &rzg2l_csi2_global_timings[i]; in rzg2l_csi2_dphy_enable()
312 if (csi2->hsfreq <= dphy_timing->max_hsfreq) in rzg2l_csi2_dphy_enable()
320 dphytim0 = CSIDPHYTIM0_TCLK_MISS(dphy_timing->tclk_miss) | in rzg2l_csi2_dphy_enable()
321 CSIDPHYTIM0_T_INIT(dphy_timing->t_init); in rzg2l_csi2_dphy_enable()
322 dphytim1 = CSIDPHYTIM1_THS_PREPARE(dphy_timing->ths_prepare) | in rzg2l_csi2_dphy_enable()
323 CSIDPHYTIM1_TCLK_PREPARE(dphy_timing->tclk_prepare) | in rzg2l_csi2_dphy_enable()
324 CSIDPHYTIM1_THS_SETTLE(dphy_timing->ths_settle) | in rzg2l_csi2_dphy_enable()
325 CSIDPHYTIM1_TCLK_SETTLE(dphy_timing->tclk_settle); in rzg2l_csi2_dphy_enable()
/openbmc/linux/drivers/gpu/drm/stm/
H A Ddw_mipi_dsi-stm.c368 struct dw_mipi_dsi_dphy_timing dphy_timing; in dw_mipi_dsi_stm_mode_valid() local
405 ret = dw_mipi_dsi_phy_get_timing(priv_data, lane_mbps, &dphy_timing); in dw_mipi_dsi_stm_mode_valid()
413 delay_to_lp = DIV_ROUND_UP((dphy_timing.data_hs2lp + dphy_timing.data_lp2hs) * in dw_mipi_dsi_stm_mode_valid()