Searched refs:div_reg (Results 1 – 2 of 2) sorted by relevance
32 u16 div_reg; member155 if (plat->div_reg) { in socfpga_a10_clk_get_rate()156 reg = readl(plat->regs + plat->div_reg); in socfpga_a10_clk_get_rate()333 plat->div_reg = divreg[0]; in socfpga_a10_ofdata_to_platdata()
461 u32 div_reg = readl(&scu->uart_24m_ref_uxclk); in ast2600_get_uart_uxclk_rate() local464 u32 n = (div_reg >> 8) & 0x3ff; in ast2600_get_uart_uxclk_rate()465 u32 r = div_reg & 0xff; in ast2600_get_uart_uxclk_rate()475 u32 div_reg = readl(&scu->uart_24m_ref_huxclk); in ast2600_get_uart_huxclk_rate() local479 u32 n = (div_reg >> 8) & 0x3ff; in ast2600_get_uart_huxclk_rate()480 u32 r = div_reg & 0xff; in ast2600_get_uart_huxclk_rate()