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Searched refs:div3_ctrl_value (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/drivers/phy/mediatek/
H A Dphy-mtk-hdmi-mt8195.c83 u8 div3_ctrl_value; in mtk_hdmi_pll_set_hw() local
114 div3_ctrl_value = 0x0; in mtk_hdmi_pll_set_hw()
118 div3_ctrl_value = 0x0; in mtk_hdmi_pll_set_hw()
122 div3_ctrl_value = 0x1; in mtk_hdmi_pll_set_hw()
126 div3_ctrl_value = 0x1; in mtk_hdmi_pll_set_hw()
133 mtk_phy_update_field(regs + HDMI_1_PLL_CFG_4, RG_HDMITXPLL_POSDIV_DIV3_CTRL, div3_ctrl_value); in mtk_hdmi_pll_set_hw()