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Searched refs:div1 (Results 1 – 15 of 15) sorted by relevance

/openbmc/u-boot/arch/sh/lib/
H A Dudivsi3.S15 div1 r5,r4
17 div1 r5,r4; div1 r5,r4; div1 r5,r4
18 div1 r5,r4; div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
21 div1 r5,r4; rotcl r0
22 div1 r5,r4; rotcl r0
23 div1 r5,r4; rotcl r0
24 rts; div1 r5,r4
37 div1 r5,r4
43 div1 r5,r4
H A Dudivsi3_i4i-Os.S38 div1 r5,r4
40 div1 r5,r4
41 div1 r5,r4
43 div1 r5,r4
48 div1 r5,r4
50 div1 r5,r4
58 div1 r5,r4
60 div1 r5,r4; div1 r5,r4; div1 r5,r4
61 div1 r5,r4; div1 r5,r4; rts; div1 r5,r4
65 div1 r5,r4
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H A Dudivsi3_i4i.S54 div1 r5,r0
56 div1 r5,r0
57 div1 r5,r0
59 div1 r5,r0
101 div1 r5,r0
108 div1 r5,r0
111 div1 r5,r0
114 div1 r5,r0
117 div1 r5,r0
119 div1 r5,r0
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H A Dudiv_qrnnd.S28 div1 r6,r0
/openbmc/u-boot/drivers/clk/
H A Dclk_zynq.c227 u32 clk_ctrl, div0, div1; in zynq_clk_get_dci_rate() local
232 div1 = (clk_ctrl & CLK_CTRL_DIV1_MASK) >> CLK_CTRL_DIV1_SHIFT; in zynq_clk_get_dci_rate()
235 zynq_clk_get_pll_rate(priv, ddrpll_clk), div0), div1); in zynq_clk_get_dci_rate()
244 u32 div1 = 1; in zynq_clk_get_peripheral_rate() local
254 div1 = (clk_ctrl & CLK_CTRL_DIV1_MASK) >> CLK_CTRL_DIV1_SHIFT; in zynq_clk_get_peripheral_rate()
255 if (!div1) in zynq_clk_get_peripheral_rate()
256 div1 = 1; in zynq_clk_get_peripheral_rate()
266 div1); in zynq_clk_get_peripheral_rate()
289 u32 *div0, u32 *div1) in zynq_clk_calc_peripheral_two_divs() argument
303 *div1 = d1; in zynq_clk_calc_peripheral_two_divs()
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H A Dclk_zynqmp.c420 u32 div1 = 1; in zynqmp_clk_get_peripheral_rate() local
435 div1 = (clk_ctrl & CLK_CTRL_DIV1_MASK) >> CLK_CTRL_DIV1_SHIFT; in zynqmp_clk_get_peripheral_rate()
436 if (!div1) in zynqmp_clk_get_peripheral_rate()
437 div1 = 1; in zynqmp_clk_get_peripheral_rate()
447 DIV_ROUND_CLOSEST(pllrate, div0), div1); in zynqmp_clk_get_peripheral_rate()
455 u32 div1 = 1; in zynqmp_clk_get_wdt_rate() local
476 div1 = (clk_ctrl & CLK_CTRL_DIV0_MASK) >> CLK_CTRL_DIV0_SHIFT; in zynqmp_clk_get_wdt_rate()
477 if (!div1) in zynqmp_clk_get_wdt_rate()
478 div1 = 1; in zynqmp_clk_get_wdt_rate()
490 DIV_ROUND_CLOSEST(pllrate, div0), div1); in zynqmp_clk_get_wdt_rate()
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/openbmc/u-boot/arch/arm/mach-sunxi/
H A Dclock_sun8i_a83t.c111 unsigned int div1 = 0, div2 = 0; in clock_set_pll5() local
117 div1 << CCM_PLL5_DIV1_SHIFT, &ccm->pll5_cfg); in clock_set_pll5()
130 int div1 = ((rval & CCM_PLL6_CTRL_DIV1_MASK) >> in clock_get_pll6() local
134 return 24000000 * n / div1 / div2; in clock_get_pll6()
H A Dclock_sun50i_h6.c88 int div1 = ((rval & CCM_PLL6_CTRL_DIV1_MASK) >> in clock_get_pll6() local
93 return 24000000 / 4 * n / div1 / div2; in clock_get_pll6()
/openbmc/u-boot/arch/arm/mach-s5pc1xx/include/mach/
H A Dclock.h29 unsigned int div1; member
65 unsigned int div1; member
/openbmc/u-boot/board/samsung/smdkc100/
H A Donenand.c40 value = readl(&clk->div1); in onenand_board_init()
43 writel(value, &clk->div1); in onenand_board_init()
/openbmc/qemu/tests/tcg/mips/user/isa/r5900/
H A Dtest_r5900_div1.c11 static struct quotient_remainder div1(int32_t rs, int32_t rt) in div1() function
32 struct quotient_remainder qr = div1(rs, rt); in verify_div1()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun50i_h6.h238 #define CCM_PLL5_CTRL_DIV1(div1) ((div1) << 0) argument
/openbmc/u-boot/arch/arm/mach-keystone/include/mach/
H A Dclock_defs.h21 u32 div1; /* 18 */ member
/openbmc/u-boot/arch/arm/mach-keystone/
H A Dclock.c130 offset = pllctl_reg(data->pll, div1) + i; in configure_main_pll()
/openbmc/openbmc/poky/bitbake/lib/toaster/toastergui/static/js/
H A Djquery-2.0.3.min.map1 …","outermost","contextBackup","dirrunsUnique","group","contexts","token","div1","defaultValue","un…