| /openbmc/linux/Documentation/devicetree/bindings/display/mediatek/ |
| H A D | mediatek,dither.yaml | 4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,dither.yaml#
7 title: Mediatek display dither processor
14 Mediatek display dither processor, namely DITHER, works by approximating
26 - mediatek,mt8183-disp-dither
29 - mediatek,mt8186-disp-dither
30 - mediatek,mt8188-disp-dither
31 - mediatek,mt8192-disp-dither
32 - mediatek,mt8195-disp-dither
33 - const: mediatek,mt8183-disp-dither
78 dither0: dither@14012000 {
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| /openbmc/linux/Documentation/ABI/testing/ |
| H A D | sysfs-bus-iio-dac-ltc2688 | 5 Dither enable. Write 1 to enable dither or 0 to disable it. This is useful
6 for changing the dither parameters. They way it should be done is:
8 - disable dither operation;
9 - change dither parameters (eg: frequency, phase...);
10 - enabled dither operation
16 This raw, unscaled value refers to the dither signal amplitude.
24 Available range for dither raw amplitude values.
37 Sets the dither signal frequency. Units are in Hz.
43 Returns the available values for the dither frequency.
49 Sets the dither signal phase. Units are in Radians.
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| H A D | sysfs-bus-iio-dac-ad5766 | 5 Dither enable. Write 1 to enable dither or 0 to disable it.
11 Inverts the dither applied to the selected DAC channel. Dither is not
12 inverted by default. Write "1" to invert dither.
24 Scales the dither before it is applied to the selected channel.
30 Selects dither source applied to the selected channel. Write "0" to
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| /openbmc/linux/drivers/gpu/drm/nouveau/dispnv50/ |
| H A D | head.c | 72 if (asyh->set.dither ) head->func->dither (head, asyh); in nv50_head_flush_set()
98 if (asyc->dither.mode) { in nv50_head_atomic_check_dither()
99 if (asyc->dither.mode == DITHERING_MODE_AUTO) { in nv50_head_atomic_check_dither()
103 mode = asyc->dither.mode; in nv50_head_atomic_check_dither()
106 if (asyc->dither.depth == DITHERING_DEPTH_AUTO) { in nv50_head_atomic_check_dither()
110 mode |= asyc->dither.depth; in nv50_head_atomic_check_dither()
115 asyh->dither.bits = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, BITS); in nv50_head_atomic_check_dither()
117 asyh->set.dither = true; in nv50_head_atomic_check_dither()
371 asyc->set.dither = true; in nv50_head_atomic_check()
389 if (asyc->set.dither) in nv50_head_atomic_check()
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| H A D | head917d.c | 41 NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in head917d_dither()
42 NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) | in head917d_dither()
43 NVVAL(NV917D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) | in head917d_dither()
135 .dither = head917d_dither,
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| H A D | headc37d.c | 96 NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in headc37d_dither()
97 NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) | in headc37d_dither()
99 NVVAL(NVC37D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) | in headc37d_dither()
296 .dither = headc37d_dither,
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| H A D | atom.h | 108 } dither; member
142 bool dither:1; member
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| H A D | head507d.c | 59 NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in head507d_dither()
60 NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) | in head507d_dither()
61 NVVAL(NV507D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) | in head507d_dither()
447 .dither = head507d_dither,
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| H A D | head907d.c | 88 NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, ENABLE, asyh->dither.enable) | in head907d_dither()
89 NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, BITS, asyh->dither.bits) | in head907d_dither()
90 NVVAL(NV907D, HEAD_SET_DITHER_CONTROL, MODE, asyh->dither.mode) | in head907d_dither()
430 .dither = head907d_dither,
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| H A D | head.h | 48 int (*dither)(struct nv50_head *, struct nv50_head_atom *); member
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| H A D | head827d.c | 166 .dither = head507d_dither,
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| /openbmc/linux/Documentation/devicetree/bindings/iio/dac/ |
| H A D | adi,ltc2688.yaml | 88 adi,toggle-dither-input:
91 only makes sense for toggle or dither enabled channels. If
93 assumed to be a dither capable channel. Note that multiple channels
104 adi,toggle-dither-input: [ clocks ]
142 adi,toggle-dither-input = <2>;
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| /openbmc/linux/drivers/gpu/drm/nouveau/ |
| H A D | nouveau_connector.c | 114 *val = asyc->dither.mode; in nouveau_conn_atomic_get_property()
116 *val = asyc->dither.depth; in nouveau_conn_atomic_get_property()
192 if (asyc->dither.mode != val) { in nouveau_conn_atomic_set_property()
193 asyc->dither.mode = val; in nouveau_conn_atomic_set_property()
194 asyc->set.dither = true; in nouveau_conn_atomic_set_property()
198 if (asyc->dither.mode != val) { in nouveau_conn_atomic_set_property()
199 asyc->dither.depth = val; in nouveau_conn_atomic_set_property()
200 asyc->set.dither = true; in nouveau_conn_atomic_set_property()
238 asyc->dither = armc->dither; in nouveau_conn_atomic_duplicate_state()
350 armc->dither.mode); in nouveau_conn_attach_properties()
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| H A D | nouveau_connector.h | 89 } dither; member
112 bool dither:1; member
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| /openbmc/linux/drivers/gpu/drm/i915/display/ |
| H A D | dvo_ns2501.c | 209 u8 dither; /* configuration of the dithering */ member
236 .dither = 0x0f,
256 .dither = 0x0f,
275 .dither = 0x0f,
639 ns2501_writeb(dvo, NS2501_REGF9, conf->dither); in ns2501_mode_set()
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| /openbmc/linux/drivers/gpu/drm/nouveau/dispnv04/ |
| H A D | dfp.c | 422 regp->dither = savep->dither | 0x00010000; in nv04_dfp_mode_set()
425 regp->dither = savep->dither | 0x00000001; in nv04_dfp_mode_set()
440 regp->dither = savep->dither; in nv04_dfp_mode_set()
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| H A D | disp.h | 58 uint32_t dither; member
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| H A D | hw.c | 409 regp->dither = NVReadRAMDAC(dev, head, NV_RAMDAC_DITHER_NV11); in nv_save_state_ramdac()
434 regp->dither = NVReadRAMDAC(dev, head, NV_RAMDAC_FP_DITHER); in nv_save_state_ramdac()
486 NVWriteRAMDAC(dev, head, NV_RAMDAC_DITHER_NV11, regp->dither); in nv_load_state_ramdac()
512 NVWriteRAMDAC(dev, head, NV_RAMDAC_FP_DITHER, regp->dither); in nv_load_state_ramdac()
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| /openbmc/linux/drivers/gpu/drm/msm/disp/dpu1/ |
| H A D | dpu_hw_catalog.c | 492 .dither = {.name = "dither", .id = DPU_PINGPONG_DITHER, .base = 0x30e0,
497 .dither = {.name = "dither", .id = DPU_PINGPONG_DITHER, .base = 0x30e0,
502 .dither = {.name = "dither", .id = DPU_PINGPONG_DITHER, .base = 0xe0,
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| H A D | dpu_kms.c | 930 if (cat->pingpong[i].sblk && cat->pingpong[i].sblk->dither.len > 0) in dpu_kms_mdp_snapshot()
931 msm_disp_snapshot_add_block(disp_state, cat->pingpong[i].sblk->dither.len, in dpu_kms_mdp_snapshot()
932 base + cat->pingpong[i].sblk->dither.base, in dpu_kms_mdp_snapshot()
934 cat->pingpong[i].sblk->dither.name); in dpu_kms_mdp_snapshot()
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| H A D | dpu_hw_catalog.h | 429 struct dpu_pp_blk dither; member
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| /openbmc/linux/drivers/gpu/drm/radeon/ |
| H A D | rs600.c | 173 enum radeon_connector_dither dither = RADEON_FMT_DITHER_DISABLE; in avivo_program_fmt() local
178 dither = radeon_connector->dither; in avivo_program_fmt()
190 if (dither == RADEON_FMT_DITHER_ENABLE) in avivo_program_fmt()
197 if (dither == RADEON_FMT_DITHER_ENABLE) in avivo_program_fmt()
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| /openbmc/u-boot/doc/imx/common/ |
| H A D | imx5.txt | 14 This workaround implements an undocumented feature in the PLL (dither
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| /openbmc/linux/drivers/video/fbdev/nvidia/ |
| H A D | nv_type.h | 62 u32 dither; member
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| H A D | nvidia.c | 472 state->dither = NV_RD32(par->PRAMDAC, 0x0528) & in nvidia_calc_regs()
475 state->dither |= 0x00010000; in nvidia_calc_regs()
477 state->dither = NV_RD32(par->PRAMDAC, 0x083C) & ~1; in nvidia_calc_regs()
479 state->dither |= 1; in nvidia_calc_regs()
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