Searched refs:dg1 (Results 1 – 7 of 7) sorted by relevance
/openbmc/linux/arch/arm/crypto/ |
H A D | sha2-ce-core.S | 29 dg1 .req q14 37 sha256h.32 dg0, dg1, tb\ev 38 sha256h2.32 dg1, dg2, tb\ev 95 vmov dg1, dgb 117 vadd.u32 dgb, dgb, dg1
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H A D | sha1-ce-core.S | 36 .macro add_only, op, ev, rc, s0, dg1 41 .ifb \dg1 44 sha1\op\().32 dg0, \dg1, ta\ev 48 .macro add_update, op, ev, rc, s0, s1, s2, s3, dg1 50 add_only \op, \ev, \rc, \s1, \dg1
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/openbmc/linux/arch/arm64/crypto/ |
H A D | sha1-ce-core.S | 34 .macro add_only, op, ev, rc, s0, dg1 argument 38 .ifnb \dg1 39 sha1\op dg0q, \dg1, t0.4s 52 .macro add_update, op, ev, rc, s0, s1, s2, s3, dg1 argument 54 add_only \op, \ev, \rc, \s1, \dg1
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/openbmc/linux/drivers/gpu/drm/i915/ |
H A D | TODO.txt | 4 - For discrete memory manager, merge enough dg1 to be able to refactor it to
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/openbmc/linux/drivers/gpu/drm/i915/gt/uc/ |
H A D | intel_uc_fw.c | 99 fw_def(DG1, 0, guc_maj(dg1, 70, 5, 1)) \ 120 fw_def(DG1, 0, huc_raw(dg1)) \
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/openbmc/linux/drivers/gpu/drm/i915/display/ |
H A D | intel_dmc.c | 110 #define DG1_DMC_PATH DMC_LEGACY_PATH(dg1, 2, 02)
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H A D | intel_hotplug_irq.c | 1395 HPD_FUNCS(dg1);
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