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Searched refs:ddrphy_trained_csr (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/drivers/ddr/imx/imx8m/
H A Dddrphy_csr.c10 struct dram_cfg_param ddrphy_trained_csr[] = { variable
732 uint32_t ddrphy_trained_csr_num = ARRAY_SIZE(ddrphy_trained_csr);
H A Dhelper.c156 saved_timing->ddrphy_trained_csr = cfg; in dram_config_save()
158 cfg->reg = ddrphy_trained_csr[i].reg; in dram_config_save()
159 cfg->val = ddrphy_trained_csr[i].val; in dram_config_save()
H A Dddrphy_train.c85 ddrphy_trained_csr_save(ddrphy_trained_csr, ddrphy_trained_csr_num); in ddr_cfg_phy()
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dddr.h694 struct dram_cfg_param *ddrphy_trained_csr; member
737 extern struct dram_cfg_param ddrphy_trained_csr[];