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Searched refs:ddrphy_mr0 (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/arm/mach-uniphier/dram/
H A Dddrphy-ld4.c28 static u32 ddrphy_mr0[DRAM_FREQ_NR] = {0x00000b51, 0x00000d71}; variable
66 writel(ddrphy_mr0[freq_e], phy_base + PHY_MR0); in uniphier_ld4_ddrphy_init()
H A Dumc-pxs2.c47 static u32 ddrphy_mr0[DRAM_FREQ_NR] = {0x00000115, 0x00000125}; variable
187 writel(ddrphy_mr0[freq], phy_base + MPHY_MR0); in ddrphy_init()
/openbmc/u-boot/drivers/ram/
H A Dk3-am654-ddrss.h1133 u32 ddrphy_mr0; member
H A Dk3-am654-ddrss.c236 ddrss_phy_writel(DDRSS_DDRPHY_MR0, ctrl->ddrphy_mr0); in am654_ddrss_phy_configuration()