Searched refs:ddrdqsclk (Results 1 – 2 of 2) sorted by relevance
218 writel(cfg->ddrdqsclk & CLKMGR_SDRPLLGRP_DDRDQSCLK_CNT_MASK, in cm_basic_init()219 &clock_manager_base->sdr_pll.ddrdqsclk); in cm_basic_init()267 ret = cm_write_with_phase(cfg->ddrdqsclk, in cm_basic_init()268 &clock_manager_base->sdr_pll.ddrdqsclk, in cm_basic_init()395 reg = readl(&clock_manager_base->sdr_pll.ddrdqsclk); in cm_get_sdram_clk_hz()
39 u32 ddrdqsclk; member86 u32 ddrdqsclk; member