Searched refs:ddrdiv (Results 1 – 3 of 3) sorted by relevance
262 u32 cpudiv, ddrdiv, busdiv; in ar934x_update_clock() local298 ddrdiv = (ctrl >> AR934X_PLL_CLK_CTRL_DDR_POST_DIV_SHIFT) & in ar934x_update_clock()304 gd->mem_clk = ddrclk / (ddrdiv + 1); in ar934x_update_clock()
25 #define MK_CLK_CNTL(cpudiv, ddrdiv, ahbdiv) \ argument27 ((0x3 & (ddrdiv - 1)) << 10) | \
20 #define MK_CLK_CNTL(cpudiv, ddrdiv, ahbdiv) \ argument22 ((0x3 & (ddrdiv - 1)) << 10) | \