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Searched refs:ddr_sync (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dcpu.c59 u32 ddr_sync = 0; /* only async mode is supported */ in checkcpu() local
61 u32 ddr_sync = ((gur->rcwsr[5]) & FSL_CORENET_RCWSR5_DDR_SYNC) in checkcpu() local
188 if (ddr_sync == 1) { in checkcpu()