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Searched refs:dcn3_1_soc (Results 1 – 1 of 1) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/
H A Ddcn31_fpu.c120 static struct _vcs_dpi_soc_bounding_box_st dcn3_1_soc = { variable
592 memcpy(s, dcn3_1_soc.clock_limits, sizeof(dcn3_1_soc.clock_limits)); in dcn31_update_bw_bounding_box()
597 dcn3_1_soc.num_chans = bw_params->num_channels; in dcn31_update_bw_bounding_box()
629 dcn3_1_soc.clock_limits[closest_clk_lvl].dispclk_mhz; in dcn31_update_bw_bounding_box()
632 dcn3_1_soc.clock_limits[closest_clk_lvl].dppclk_mhz; in dcn31_update_bw_bounding_box()
635 dcn3_1_soc.clock_limits[closest_clk_lvl].dram_bw_per_chan_gbps; in dcn31_update_bw_bounding_box()
636 s[i].dscclk_mhz = dcn3_1_soc.clock_limits[closest_clk_lvl].dscclk_mhz; in dcn31_update_bw_bounding_box()
639 dcn3_1_soc.clock_limits[closest_clk_lvl].phyclk_d18_mhz; in dcn31_update_bw_bounding_box()
643 dcn3_1_soc.num_states = clk_table->num_entries; in dcn31_update_bw_bounding_box()
646 memcpy(dcn3_1_soc.clock_limits, s, sizeof(dcn3_1_soc.clock_limits)); in dcn31_update_bw_bounding_box()
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