Searched refs:dcn3_0_soc (Results 1 – 3 of 3) sorted by relevance
125 struct _vcs_dpi_soc_bounding_box_st dcn3_0_soc = { variable624 dcn3_0_soc.dram_channel_width_bytes * (dcn3_0_soc.max_avg_dram_bw_use_normal_percent / 100); in dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk()626 dcn3_0_soc.dram_channel_width_bytes * (dcn3_0_soc.max_avg_sdp_bw_use_normal_percent / 100); in dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk()632 …(dcn3_0_soc.fabric_datapath_to_dcn_data_return_bytes * (dcn3_0_soc.max_avg_sdp_bw_use_normal_perce… in dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk()636 (dcn3_0_soc.return_bus_width_bytes * (dcn3_0_soc.max_avg_sdp_bw_use_normal_percent / 100)); in dcn30_fpu_get_optimal_dcfclk_fclk_for_uclk()652 for (i = 0; i < dcn3_0_soc.num_states; i++) { in dcn30_fpu_update_bw_bounding_box()653 dcn3_0_soc.clock_limits[i].state = i; in dcn30_fpu_update_bw_bounding_box()662 dcn3_0_soc.clock_limits[i].dtbclk_mhz = dcn3_0_soc.clock_limits[0].dtbclk_mhz; in dcn30_fpu_update_bw_bounding_box()665 dcn3_0_soc.clock_limits[i].phyclk_d18_mhz = dcn3_0_soc.clock_limits[0].phyclk_d18_mhz; in dcn30_fpu_update_bw_bounding_box()666 dcn3_0_soc.clock_limits[i].socclk_mhz = dcn3_0_soc.clock_limits[0].socclk_mhz; in dcn30_fpu_update_bw_bounding_box()[all …]
39 extern struct _vcs_dpi_soc_bounding_box_st dcn3_0_soc;
1500 struct _vcs_dpi_soc_bounding_box_st *loaded_bb = &dcn3_0_soc; in init_soc_bounding_box()1515 patch_dcn30_soc_bounding_box(dc, &dcn3_0_soc); in init_soc_bounding_box()2108 dcn3_0_soc.num_chans = dc->ctx->dc_bios->vram_info.num_chans; in dcn30_update_bw_bounding_box()2199 dcn3_0_soc.num_states = num_states; in dcn30_update_bw_bounding_box()2428 dml_init_instance(&dc->dml, &dcn3_0_soc, &dcn3_0_ip, DML_PROJECT_DCN30); in dcn30_resource_construct()