Searched refs:dcn3_03_soc (Results 1 – 3 of 3) sorted by relevance
174 dcn3_03_soc.dram_channel_width_bytes * (dcn3_03_soc.max_avg_dram_bw_use_normal_percent / 100); in dcn303_get_optimal_dcfclk_fclk_for_uclk()176 dcn3_03_soc.dram_channel_width_bytes * (dcn3_03_soc.max_avg_sdp_bw_use_normal_percent / 100); in dcn303_get_optimal_dcfclk_fclk_for_uclk()187 (dcn3_03_soc.return_bus_width_bytes * (dcn3_03_soc.max_avg_sdp_bw_use_normal_percent / 100)); in dcn303_get_optimal_dcfclk_fclk_for_uclk()302 dcn3_03_soc.num_states = num_states; in dcn303_fpu_update_bw_bounding_box()303 for (i = 0; i < dcn3_03_soc.num_states; i++) { in dcn303_fpu_update_bw_bounding_box()304 dcn3_03_soc.clock_limits[i].state = i; in dcn303_fpu_update_bw_bounding_box()315 dcn3_03_soc.clock_limits[i].dtbclk_mhz = dcn3_03_soc.clock_limits[i-1].dtbclk_mhz; in dcn303_fpu_update_bw_bounding_box()319 dcn3_03_soc.clock_limits[i].socclk_mhz = dcn3_03_soc.clock_limits[i-1].socclk_mhz; in dcn303_fpu_update_bw_bounding_box()324 dcn3_03_soc.clock_limits[i].phyclk_d18_mhz = dcn3_03_soc.clock_limits[0].phyclk_d18_mhz; in dcn303_fpu_update_bw_bounding_box()325 dcn3_03_soc.clock_limits[i].dscclk_mhz = dcn3_03_soc.clock_limits[0].dscclk_mhz; in dcn303_fpu_update_bw_bounding_box()[all …]
14 extern struct _vcs_dpi_soc_bounding_box_st dcn3_03_soc;
880 struct _vcs_dpi_soc_bounding_box_st *loaded_bb = &dcn3_03_soc; in init_soc_bounding_box()1261 dml_init_instance(&dc->dml, &dcn3_03_soc, &dcn3_03_ip, DML_PROJECT_DCN30); in dcn303_resource_construct()