Searched refs:davinci_syscfg_regs (Results 1 – 11 of 11) sorted by relevance
234 writel(readl(&davinci_syscfg_regs->suspsrc) & in board_early_init_f()238 &davinci_syscfg_regs->suspsrc); in board_early_init_f()260 writel(readl(&davinci_syscfg_regs->mstpri[2]) & 0x0fffffff, in board_early_init_f()261 &davinci_syscfg_regs->mstpri[2]); in board_early_init_f()
40 clrbits_le32(&davinci_syscfg_regs->cfgchip0, PLL_MASTER_LOCK); in da850_pll_init()154 dv_maskbits(&davinci_syscfg_regs->cfgchip3, in da850_pll_init()263 writel(DV_SYSCFG_KICK0_UNLOCK, &davinci_syscfg_regs->kick0); in arch_cpu_init()264 writel(DV_SYSCFG_KICK1_UNLOCK, &davinci_syscfg_regs->kick1); in arch_cpu_init()266 dv_maskbits(&davinci_syscfg_regs->suspsrc, in arch_cpu_init()
76 val = readl(&davinci_syscfg_regs->cfgchip3); in davinci_emac_mii_mode_sel()81 writel(val, &davinci_syscfg_regs->cfgchip3); in davinci_emac_mii_mode_sel()
47 switch (davinci_syscfg_regs->bootcfg) { in spl_boot_device()
110 val = readl(&davinci_syscfg_regs->cfgchip3); in board_init()112 writel(val, &davinci_syscfg_regs->cfgchip3); in board_init()
30 #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])184 writel(readl(&davinci_syscfg_regs->suspsrc) & in board_init()188 &davinci_syscfg_regs->suspsrc); in board_init()
387 writel(readl(&davinci_syscfg_regs->suspsrc) & in board_init()391 &davinci_syscfg_regs->suspsrc); in board_init()
162 writel(readl(&davinci_syscfg_regs->suspsrc) & in board_init()166 &davinci_syscfg_regs->suspsrc); in board_init()
477 struct davinci_syscfg_regs { struct499 #define davinci_syscfg_regs \ argument500 ((struct davinci_syscfg_regs *)DAVINCI_BOOTCFG_BASE)511 #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])605 return (REG(&davinci_syscfg_regs->cfgchip3) & 0x10) ? in get_async3_src()
200 writel(readl(&davinci_syscfg_regs->suspsrc) & in board_init()204 &davinci_syscfg_regs->suspsrc); in board_init()
28 #define pinmux(x) (&davinci_syscfg_regs->pinmux[x])