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Searched refs:data_rate (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/drivers/video/
H A Danx9804.h19 void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate, int bpp);
21 static inline void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate, in anx9804_init() argument
H A Danx9804.c28 void anx9804_init(unsigned int i2c_bus, u8 lanes, u8 data_rate, int bpp) in anx9804_init() argument
104 i2c_reg_write(0x38, ANX9804_LINK_BW_SET_REG, data_rate); in anx9804_init()
/openbmc/u-boot/drivers/ddr/fsl/
H A Dutil.c71 unsigned int data_rate = get_ddr_freq(ctrl_num); in get_memory_clk_period_ps() local
78 rem = do_div(mclk_ps, data_rate); in get_memory_clk_period_ps()
79 result = (rem >= (data_rate >> 1)) ? mclk_ps + 1 : mclk_ps; in get_memory_clk_period_ps()
88 unsigned long data_rate = get_ddr_freq(ctrl_num); in picos_to_mclk() local
95 clks = picos * (unsigned long long)data_rate; in picos_to_mclk()
105 if (clks_rem > data_rate) in picos_to_mclk()
H A Dctrl_regs.c320 unsigned int data_rate = get_ddr_freq(ctrl_num); in set_timing_cfg_0() local
323 trwt_mclk = (data_rate/1000000 > 1900) ? 3 : 2; in set_timing_cfg_0()
350 unsigned int data_rate = get_ddr_freq(ctrl_num); in set_timing_cfg_0() local
406 trwt_mclk = (data_rate/1000000 > 1800) ? 2 : 1; in set_timing_cfg_0()
408 if ((data_rate/1000000 > 1150) || (popts->memctl_interleaving)) in set_timing_cfg_0()
/openbmc/u-boot/drivers/video/bridge/
H A Danx6345.c270 u8 chipid, colordepth, lanes, data_rate, c; in anx6345_enable() local
352 if (anx6345_read_dpcd(dev, DP_MAX_LINK_RATE, &data_rate)) { in anx6345_enable()
356 debug("%s: data_rate: %d\n", __func__, (int)data_rate); in anx6345_enable()
365 anx6345_write_r0(dev, ANX9804_LINK_BW_SET_REG, data_rate); in anx6345_enable()