Home
last modified time | relevance | path

Searched refs:data_dma_base1 (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dgm20b.c43 addr = ((u64)hdr.data_dma_base1 << 40 | hdr.data_dma_base << 8); in gm20b_gr_acr_bld_patch()
45 hdr.data_dma_base1 = upper_32_bits((addr + adjust) >> 8); in gm20b_gr_acr_bld_patch()
67 .data_dma_base1 = upper_32_bits(data), in gm20b_gr_acr_bld_write()
/openbmc/linux/drivers/gpu/drm/nouveau/include/nvfw/
H A Dflcn.h19 u32 data_dma_base1; member
56 u32 data_dma_base1; member
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/nvfw/
H A Dflcn.c40 nvkm_debug(subdev, "\tdataDmaBase1 : 0x%x\n", hdr->data_dma_base1); in loader_config_dump()
83 nvkm_debug(subdev, "\tdataDmaBase1 : 0x%x\n", hdr->data_dma_base1); in flcn_bl_dmem_desc_dump()
/openbmc/linux/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
H A Dgm20b.c75 addr = ((u64)hdr.data_dma_base1 << 40 | hdr.data_dma_base << 8); in gm20b_pmu_acr_bld_patch()
77 hdr.data_dma_base1 = upper_32_bits((addr + adjust) >> 8); in gm20b_pmu_acr_bld_patch()
105 .data_dma_base1 = upper_32_bits(data), in gm20b_pmu_acr_bld_write()