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Searched refs:ctrl3 (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/crypto/bcm/
H A Dspu2.c562 u64 ctrl3; in spu2_fmd_init() local
587 ctrl3 = 0; in spu2_fmd_init()
592 fmd->ctrl3 = cpu_to_le64(ctrl3); in spu2_fmd_init()
762 u64 ctrl3; in spu2_fmd_ctrl3_write() local
766 fmd->ctrl3 = cpu_to_le64(ctrl3); in spu2_fmd_ctrl3_write()
808 u64 ctrl3; in spu2_payload_length() local
810 ctrl3 = le64_to_cpu(fmd->ctrl3); in spu2_payload_length()
1191 u64 ctrl3; in spu2_cipher_req_finish() local
1221 ctrl3 = le64_to_cpu(fmd->ctrl3); in spu2_cipher_req_finish()
1223 ctrl3 |= data_size; in spu2_cipher_req_finish()
[all …]
H A Dspu2.h79 __le64 ctrl3; member
/openbmc/qemu/hw/timer/
H A Daspeed_timer.c511 value = s->ctrl3 & BIT(0); in aspeed_2500_timer_read()
536 s->ctrl3 = 0x1; in aspeed_2500_timer_write()
538 s->ctrl3 = 0x0; in aspeed_2500_timer_write()
542 if (s->ctrl3 & BIT(0)) { in aspeed_2500_timer_write()
640 s->ctrl3 = 0; in aspeed_timer_reset()
665 VMSTATE_UINT32(ctrl3, AspeedTimerCtrlState),
/openbmc/u-boot/arch/arm/include/asm/arch-aspeed/
H A Dtimer.h43 u32 ctrl3; member
/openbmc/qemu/include/hw/timer/
H A Daspeed_timer.h63 uint32_t ctrl3; member
/openbmc/linux/drivers/media/i2c/
H A Dov2659.c183 u8 ctrl3; member
702 static const struct pll_ctrl_reg ctrl3[] = { variable
904 for (j = 0; ctrl3[j].div != 0; j++) { in ov2659_pll_calc_params()
905 prediv = ctrl3[j].div; in ov2659_pll_calc_params()
918 ctrl3_reg = ctrl3[j].reg; in ov2659_pll_calc_params()
926 ov2659->pll.ctrl3 = ctrl3_reg; in ov2659_pll_calc_params()
939 {REG_SC_PLL_CTRL3, ov2659->pll.ctrl3}, in ov2659_set_pixel_clock()
/openbmc/u-boot/arch/arm/include/asm/arch-tegra/
H A Dtegra_i2c.h56 u32 ctrl3; /* 08: DVC_CTRL_REG3 */ member
/openbmc/linux/drivers/net/ethernet/stmicro/stmmac/
H A Ddwmac4_core.c100 u32 ctrl2, ctrl3; in dwmac4_rx_queue_priority() local
104 ctrl3 = readl(ioaddr + GMAC_RXQ_CTRL3); in dwmac4_rx_queue_priority()
114 ctrl3 &= ~clear_mask; in dwmac4_rx_queue_priority()
124 writel(ctrl3, ioaddr + GMAC_RXQ_CTRL3); in dwmac4_rx_queue_priority()
128 ctrl3 |= (prio << GMAC_RXQCTRL_PSRQX_SHIFT(queue)) & in dwmac4_rx_queue_priority()
131 writel(ctrl3, ioaddr + GMAC_RXQ_CTRL3); in dwmac4_rx_queue_priority()
H A Ddwxgmac2_core.c101 u32 ctrl2, ctrl3; in dwxgmac2_rx_queue_prio() local
105 ctrl3 = readl(ioaddr + XGMAC_RXQ_CTRL3); in dwxgmac2_rx_queue_prio()
115 ctrl3 &= ~clear_mask; in dwxgmac2_rx_queue_prio()
125 writel(ctrl3, ioaddr + XGMAC_RXQ_CTRL3); in dwxgmac2_rx_queue_prio()
129 ctrl3 |= (prio << XGMAC_PSRQ_SHIFT(queue)) & in dwxgmac2_rx_queue_prio()
132 writel(ctrl3, ioaddr + XGMAC_RXQ_CTRL3); in dwxgmac2_rx_queue_prio()
/openbmc/u-boot/arch/arm/include/asm/arch-hi6220/
H A Dhi6220.h25 u32 ctrl3; member
/openbmc/linux/Documentation/devicetree/bindings/sound/
H A Dcirrus,cs35l45.yaml151 cirrus,gpio-ctrl3 {
/openbmc/u-boot/drivers/i2c/
H A Dtegra_i2c.c133 setbits_le32(&dvc->ctrl3, DVC_CTRL_REG3_I2C_HW_SW_PROG_MASK); in i2c_init_controller()
/openbmc/linux/drivers/net/ethernet/marvell/mvpp2/
H A Dmvpp2_main.c4567 u32 ctrl3; in mvpp22_mode_reconfigure() local
4584 ctrl3 = readl(port->base + MVPP22_XLG_CTRL3_REG); in mvpp22_mode_reconfigure()
4585 ctrl3 &= ~MVPP22_XLG_CTRL3_MACMODESELECT_MASK; in mvpp22_mode_reconfigure()
4588 ctrl3 |= MVPP22_XLG_CTRL3_MACMODESELECT_10G; in mvpp22_mode_reconfigure()
4590 ctrl3 |= MVPP22_XLG_CTRL3_MACMODESELECT_GMAC; in mvpp22_mode_reconfigure()
4592 writel(ctrl3, port->base + MVPP22_XLG_CTRL3_REG); in mvpp22_mode_reconfigure()