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Searched refs:cs_enable (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/drivers/ddr/marvell/axp/
H A Dddr3_hw_training.c1019 int ddr3_get_min_max_read_sample_delay(u32 cs_enable, u32 reg, u32 *min, in ddr3_get_min_max_read_sample_delay() argument
1028 if ((cs_enable & (1 << cs)) == 0) in ddr3_get_min_max_read_sample_delay()
H A Dddr3_hw_training.h382 int ddr3_get_min_max_read_sample_delay(u32 cs_enable, u32 reg, u32 *min,