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Searched refs:cpu_regs (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/target/i386/tcg/
H A Dtranslate.c80 static TCGv cpu_regs[CPU_NB_REGS]; variable
448 dest = dest ? dest : cpu_regs[reg - 4]; in gen_op_deposit_reg_v()
449 tcg_gen_deposit_tl(dest, cpu_regs[reg - 4], t0, 8, 8); in gen_op_deposit_reg_v()
450 return cpu_regs[reg - 4]; in gen_op_deposit_reg_v()
452 dest = dest ? dest : cpu_regs[reg]; in gen_op_deposit_reg_v()
453 tcg_gen_deposit_tl(dest, cpu_regs[reg], t0, 0, 8); in gen_op_deposit_reg_v()
456 dest = dest ? dest : cpu_regs[reg]; in gen_op_deposit_reg_v()
457 tcg_gen_deposit_tl(dest, cpu_regs[reg], t0, 0, 16); in gen_op_deposit_reg_v()
462 dest = dest ? dest : cpu_regs[reg]; in gen_op_deposit_reg_v()
467 dest = dest ? dest : cpu_regs[reg]; in gen_op_deposit_reg_v()
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H A Demit.c.inc81 tcg_gen_sextract_tl(ofs, cpu_regs[opn], 3, poslen - 3);
280 tcg_gen_sextract_tl(v, cpu_regs[op->n - 4], 8, 8);
282 tcg_gen_extract_tl(v, cpu_regs[op->n - 4], 8, 8);
286 tcg_gen_ext_tl(v, cpu_regs[op->n], op->ot | MO_SIGN);
288 tcg_gen_ext_tl(v, cpu_regs[op->n], op->ot);
1683 * cmpv will be moved to cc_src *after* cpu_regs[] is written back, so use
1686 tcg_gen_ext_tl(cmpv, cpu_regs[decode->op[1].n], ot_full);
1760 tcg_gen_ext_tl(cmpv, cpu_regs[R_EAX], ot);
1783 * directly on cpu_regs. In case rm is part of RAX, note that this
1812 tcg_gen_concat_i64_i128(cmp, cpu_regs[R_EAX], cpu_regs[R_EDX]);
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