Searched refs:cpu_ctlr (Results 1 – 4 of 4) sorted by relevance
155 if (!(s->cpu_ctlr[cpu_iface] & group_mask)) { in gic_irq_signaling_enabled()308 (s->cpu_ctlr[vcpu] & GICC_CTLR_EN_GRP0)) { in gic_compute_misr()314 !(s->cpu_ctlr[vcpu] & GICC_CTLR_EN_GRP0)) { in gic_compute_misr()320 (s->cpu_ctlr[vcpu] & GICC_CTLR_EN_GRP1)) { in gic_compute_misr()326 !(s->cpu_ctlr[vcpu] & GICC_CTLR_EN_GRP1)) { in gic_compute_misr()459 !(s->cpu_ctlr[cpu] & GICC_CTLR_CBPR) && in gic_get_group_priority()730 uint32_t ret = s->cpu_ctlr[cpu]; in gic_get_cpu_control()756 s->cpu_ctlr[cpu] &= ~mask; in gic_set_cpu_control()757 s->cpu_ctlr[cpu] |= (value << 1) & mask; in gic_set_cpu_control()764 s->cpu_ctlr[cpu] = value & mask; in gic_set_cpu_control()[all …]
90 VMSTATE_UINT32_SUB_ARRAY(cpu_ctlr, GICState, GIC_NCPU, GIC_NCPU),109 VMSTATE_UINT32_SUB_ARRAY(cpu_ctlr, GICState, 0, GIC_NCPU),251 s->cpu_ctlr[i] = 0; in arm_gic_common_reset_irq_state()
366 reg = s->cpu_ctlr[cpu]; in kvm_arm_gic_put()454 s->cpu_ctlr[cpu] = reg; in kvm_arm_gic_get()
83 uint32_t cpu_ctlr[GIC_NCPU_VCPU]; member